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authorWANG Siyuan <wangsiyuanbuaa@gmail.com>2013-07-31 16:55:26 +0800
committerBruce Griffith <Bruce.Griffith@se-eng.com>2013-10-15 05:01:11 +0200
commit7b6d412dbc4e5c11d3dd7890abf0edf279b3f504 (patch)
tree9d41c0b6299cab6a90616fdbc3e31d6ef67797c6 /src/vendorcode/amd/agesa/f16kb/AGESA.h
parentf8bf5a10c599ef071998bbc3f16e9e3d7fcdb6eb (diff)
vendorcode/amd/agesa/f16kb: Update Kabini PI from v1.0.0.0 to v1.0.0.7
The platform initialization (PI) code v1.0.0.7 for Kabini has some enhancements like ECC DIMM support, new CPU microcode rev 0700010B, FCH bug fix (RTC) and so on. Use the name Kabini instead of Kerala everywhere. Note, the former PI code was indeed version v1.0.0.0 instead of v0.0.1.0 as used in `AGESA_VERSION_STRING`. Change-Id: I186de1aef222cd35ea69efa93967a3ffb8da7248 Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-on: http://review.coreboot.org/3935 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f16kb/AGESA.h')
-rw-r--r--src/vendorcode/amd/agesa/f16kb/AGESA.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/AGESA.h b/src/vendorcode/amd/agesa/f16kb/AGESA.h
index d71250c8e9..3e58d231a9 100644
--- a/src/vendorcode/amd/agesa/f16kb/AGESA.h
+++ b/src/vendorcode/amd/agesa/f16kb/AGESA.h
@@ -2882,6 +2882,7 @@ typedef struct {
IN SCI_MAP_CONTROL *CfgFchSciMapControl; ///< FCH SCI Mapping Control
IN SATA_PHY_CONTROL *CfgFchSataPhyControl; ///< FCH SATA PHY Control
IN GPIO_CONTROL *CfgFchGpioControl; ///< FCH GPIO Control
+ IN BOOLEAN CfgFchRtcWorkAround; ///< FCH RTC Workaround
} FCH_PLATFORM_POLICY;