diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-08-30 13:51:44 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-09-01 03:06:04 +0000 |
| commit | 8e6d5f2937c169914e46b5ebc973e5df5e4290a7 (patch) | |
| tree | 1550c8877877a7a9b197da65bcff76f878bee560 /src/vendorcode/amd/agesa/f15tn/Proc | |
| parent | b7a68d5b05259a07a84a546e6a7e40948ba705ac (diff) | |
{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent
Convert 0X -> 0x
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: Iea3ca67908135d0e85083a05bad2ea176ca34095
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44926
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f15tn/Proc')
3 files changed, 4 insertions, 4 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Table.h b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Table.h index c21cb9c845..ca44580533 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Table.h +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Table.h @@ -490,7 +490,7 @@ typedef struct { } PACKAGE_TYPE_FEATURES; // Initializer Values for Package Type -#define PACKAGE_TYPE_ALL 0XFFFF ///< Package Type apply all packages +#define PACKAGE_TYPE_ALL 0xFFFF ///< Package Type apply all packages // Initializer Values for Ht Host Pci Config Registers #define HT_HOST_FEAT_COHERENT BIT0 diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuRegisters.h b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuRegisters.h index 48fcb24efe..ecef9a7371 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuRegisters.h +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuRegisters.h @@ -212,7 +212,7 @@ typedef struct { #define MSR_CPUID_NAME_STRING0 0xC0010030ul // First CPUID namestring register #define MSR_CPUID_NAME_STRING1 0xC0010031ul -#define MSR_CPUID_NAME_STRING2 0XC0010032ul +#define MSR_CPUID_NAME_STRING2 0xC0010032ul #define MSR_CPUID_NAME_STRING3 0xC0010033ul #define MSR_CPUID_NAME_STRING4 0xC0010034ul #define MSR_CPUID_NAME_STRING5 0xC0010035ul // Last CPUID namestring register diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiEnvService.c b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiEnvService.c index cd52636bef..1cfddbea63 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiEnvService.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiEnvService.c @@ -154,8 +154,8 @@ REG8_MASK FchHudson2InitEnvHwAcpiPciTable[] = // SMBUS Device (Bus 0, Dev 20, Func 0) // {0x00, SMBUS_BUS_DEV_FUN, 0}, - {FCH_CFG_REG10, 0X00, (FCH_VERSION & 0xFF)}, ///Program the version information - {FCH_CFG_REG11, 0X00, (FCH_VERSION >> 8)}, + {FCH_CFG_REG10, 0x00, (FCH_VERSION & 0xFF)}, ///Program the version information + {FCH_CFG_REG11, 0x00, (FCH_VERSION >> 8)}, {0xFF, 0xFF, 0xFF}, }; |