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authorStefan Reinauer <reinauer@chromium.org>2015-07-30 11:17:40 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-10-30 18:24:07 +0100
commitd91ddc8d3181b8ab23726c8e744093f39473c202 (patch)
tree9214b34758be7bb547f7168fc838abeb00e05c7d /src/vendorcode/amd/agesa/f15tn/Legacy
parent772029fe7321e0ddea11711b6756a32f19572db4 (diff)
vendorcode/amd: 64bit fixes
Change-Id: I6a0752cf0c0e484e670acca97c4991b5578845fb Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/11081 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f15tn/Legacy')
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Dispatcher.c4
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c4
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Legacy/Proc/hobTransfer.c12
3 files changed, 10 insertions, 10 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Dispatcher.c b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Dispatcher.c
index b30770642d..4188f1b7be 100644
--- a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Dispatcher.c
+++ b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Dispatcher.c
@@ -82,8 +82,8 @@ AmdAgesaDispatcher (
IMAGE_ENTRY ImageEntry;
MODULE_ENTRY ModuleEntry;
DISPATCH_TABLE *Entry;
- UINT32 ImageStart;
- UINT32 ImageEnd;
+ UINTN ImageStart;
+ UINTN ImageEnd;
CONST AMD_IMAGE_HEADER* AltImagePtr;
Status = AGESA_UNSUPPORTED;
diff --git a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c
index 1df58aa4c9..198b404f0f 100644
--- a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c
+++ b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c
@@ -434,7 +434,7 @@ AgesaFchOemCallout (
IN VOID *FchData
)
{
- AGESA_STATUS Status; Status = AmdAgesaCallout(AGESA_FCH_OEM_CALLOUT, (UINT32)FchData, ((FCH_DATA_BLOCK *)FchData)->StdHeader); return Status; //return AGESA_UNSUPPORTED;
+ AGESA_STATUS Status; Status = AmdAgesaCallout(AGESA_FCH_OEM_CALLOUT, (UINTN)FchData, ((FCH_DATA_BLOCK *)FchData)->StdHeader); return Status; //return AGESA_UNSUPPORTED;
}
/*---------------------------------------------------------------------------------------*/
@@ -454,7 +454,7 @@ excel331 (
{
AGESA_STATUS Status;
- Status = AmdAgesaCallout (0x00028146ul , (UINT32)SocketIdModuleId, MemData);
+ Status = AmdAgesaCallout (0x00028146ul , SocketIdModuleId, MemData);
return Status;
}
diff --git a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/hobTransfer.c b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/hobTransfer.c
index 7ed5f16b5c..ec17b95504 100644
--- a/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/hobTransfer.c
+++ b/src/vendorcode/amd/agesa/f15tn/Legacy/Proc/hobTransfer.c
@@ -147,7 +147,7 @@ CopyHeapToTempRamAtPost (
//
// 0xC0000 ~ 0xFFFFF
//
- HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX4k_C0000 + (((AmdHeapRamAddress >> 16) & 0x3) * 2));
+ HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX4k_C0000 + ((((UINTN)AmdHeapRamAddress >> 16) & 0x3) * 2));
MsrData = AMD_MTRR_FIX4K_UC_DRAM;
LibAmdMsrWrite (HeapRamFixMtrr, &MsrData, StdHeader);
LibAmdMsrWrite ((HeapRamFixMtrr + 1), &MsrData, StdHeader);
@@ -155,7 +155,7 @@ CopyHeapToTempRamAtPost (
//
// 0x80000~0xBFFFF
//
- HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX16k_80000 + ((AmdHeapRamAddress >> 17) & 0x1));
+ HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX16k_80000 + (((UINTN)AmdHeapRamAddress >> 17) & 0x1));
MsrData = AMD_MTRR_FIX16K_UC_DRAM;
LibAmdMsrWrite (HeapRamFixMtrr, &MsrData, StdHeader);
} else {
@@ -164,7 +164,7 @@ CopyHeapToTempRamAtPost (
//
LibAmdMsrRead (AMD_MTRR_FIX64k_00000, &MsrData, StdHeader);
MsrData = MsrData & (~(0xFF << (8 * ((AmdHeapRamAddress >> 16) & 0x7))));
- MsrData = MsrData | (AMD_MTRR_FIX64K_UC_DRAM << (8 * ((AmdHeapRamAddress >> 16) & 0x7)));
+ MsrData = MsrData | (AMD_MTRR_FIX64K_UC_DRAM << (8 * (((UINTN)AmdHeapRamAddress >> 16) & 0x7)));
LibAmdMsrWrite (AMD_MTRR_FIX64k_00000, &MsrData, StdHeader);
}
@@ -208,7 +208,7 @@ CopyHeapToTempRamAtPost (
TotalSize = sizeof (HEAP_MANAGER);
SizeOfNodeData = 0;
AlignTo16ByteInTempMem = 0;
- BaseAddressInCache = (UINT8 *) (UINT32)StdHeader->HeapBasePtr;
+ BaseAddressInCache = (UINT8 *) (UINTN)StdHeader->HeapBasePtr;
HeapManagerInCache = (HEAP_MANAGER *) BaseAddressInCache;
HeapInCacheOffset = HeapManagerInCache->FirstActiveBufferOffset;
HeapInCache = (BUFFER_NODE *) (BaseAddressInCache + HeapInCacheOffset);
@@ -307,8 +307,8 @@ CopyHeapToMainRamAtPost (
TotalSize = sizeof (HEAP_MANAGER);
SizeOfNodeData = 0;
AlignTo16ByteInMainMem = 0;
- BaseAddressInTempMem = (UINT8 *)(UINT32) StdHeader->HeapBasePtr;
- HeapManagerInTempMem = (HEAP_MANAGER *)(UINT32) StdHeader->HeapBasePtr;
+ BaseAddressInTempMem = (UINT8 *)(UINTN) StdHeader->HeapBasePtr;
+ HeapManagerInTempMem = (HEAP_MANAGER *)(UINTN) StdHeader->HeapBasePtr;
HeapInTempMemOffset = HeapManagerInTempMem->FirstActiveBufferOffset;
HeapInTempMem = (BUFFER_NODE *) (BaseAddressInTempMem + HeapInTempMemOffset);