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authorKerry Sheh <shekairui@gmail.com>2012-01-20 13:57:48 +0800
committerPatrick Georgi <patrick@georgi-clan.de>2012-01-26 10:09:22 +0100
commite8689ed974992b35aede9cd831b428ac37d9be76 (patch)
tree32ef9887fe057294f7a7fb2be069dd8d39d0c5d6 /src/vendorcode/amd/agesa/f15/Proc/CPU/Feature/PreserveMailbox.h
parentd2b31bda6738e370414622bd750cebf2e28e73de (diff)
AGESA F15: AMD family15 AGESA code
AMD AGESA code to support Orochi platform family15 model 00-0fh processores, AMD C32, G34, and AM3r2 Sockets are supported. Change-Id: If79392c104ace25f7e01db794fa205f47746bcad Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/554 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * AMD AGESA CPU Preserve Registers used for AP Mailbox.
+ *
+ * Save and Restore the normal feature content of the registers being used for
+ * the AP Mailbox.
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project: AGESA
+ * @e sub-project: CPU/Feature
+ * @e \$Revision: 50096 $ @e \$Date: 2011-04-01 16:17:10 -0600 (Fri, 01 Apr 2011) $
+ *
+ */
+/*
+ ******************************************************************************
+ *
+ * Copyright (C) 2012 Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+#ifndef _PRESERVE_MAILBOX_H_
+#define _PRESERVE_MAILBOX_H_
+
+/*----------------------------------------------------------------------------------------
+ * M I X E D (Definitions And Macros / Typedefs, Structures, Enums)
+ *----------------------------------------------------------------------------------------
+ */
+#define MAX_PRESERVE_REGISTER_ENTRIES 2 ///< There is room on the heap for up to this per node.
+
+/// Reference to a save buffer.
+typedef UINT32 (*MAILBOX_REGISTER_SAVE_ENTRY) [MAX_PRESERVE_REGISTER_ENTRIES];
+
+/*----------------------------------------------------------------------------------------
+ * D E F I N I T I O N S A N D M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------
+ * T Y P E D E F S A N D S T R U C T U R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+/**
+ * Family specific mailbox register descriptor.
+ *
+ * Describes a register and bits within the register used as the mailbox.
+ */
+typedef struct {
+ PCI_ADDR Register; ///< The PCI address of a mailbox register.
+ UINT32 Mask; ///< The mask of bits used in Register as the mailbox.
+} PRESERVE_MAILBOX_FAMILY_REGISTER;
+
+/**
+ * Descriptor for family specific save-restore.
+ *
+ * Provide a list of the register offsets to save-restore on each node. Optionally, zero the
+ * register instead of restoring it.
+ */
+typedef struct {
+ UINT16 Revision; ///< Interface version
+ // Public Data.
+ BOOLEAN IsZeroOnCold; ///< On a cold boot, zero the register instead of restore.
+ PRESERVE_MAILBOX_FAMILY_REGISTER *RegisterList; ///< The list of registers, terminated by ILLEGAL_SBDFO.
+} PRESERVE_MAILBOX_FAMILY_SERVICES;
+
+
+/*----------------------------------------------------------------------------------------
+ * F U N C T I O N S P R O T O T Y P E
+ *----------------------------------------------------------------------------------------
+ */
+
+#endif // _PRESERVE_MAILBOX_H_