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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-08-31 16:58:27 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-13 22:51:57 +0000
commitd136b8ef21f9fb4f469a8f0682b086637b0ea542 (patch)
treec703d879fa2721ab3554834f479f802e950fea5a /src/vendorcode/amd/agesa/f15/Config
parentc8e4742f918b6029137bbe4e5d8fda9df52cb274 (diff)
AGESA vendorcode: Remove AGESA_ENTRY_INIT_RECOVERY
Deprecated and not used in our builds. Change-Id: I01773bb62b1599d18ad51d6f444abec46faec942 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21304 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/amd/agesa/f15/Config')
-rw-r--r--src/vendorcode/amd/agesa/f15/Config/OptionCpuFamiliesInstall.h25
-rw-r--r--src/vendorcode/amd/agesa/f15/Config/OptionFamily10hInstall.h2
-rw-r--r--src/vendorcode/amd/agesa/f15/Config/OptionIdsInstall.h7
-rw-r--r--src/vendorcode/amd/agesa/f15/Config/OptionMemoryRecoveryInstall.h263
-rw-r--r--src/vendorcode/amd/agesa/f15/Config/PlatformInstall.h2
5 files changed, 0 insertions, 299 deletions
diff --git a/src/vendorcode/amd/agesa/f15/Config/OptionCpuFamiliesInstall.h b/src/vendorcode/amd/agesa/f15/Config/OptionCpuFamiliesInstall.h
index 5cc4819046..2aafe65910 100644
--- a/src/vendorcode/amd/agesa/f15/Config/OptionCpuFamiliesInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Config/OptionCpuFamiliesInstall.h
@@ -108,31 +108,6 @@
#define TRANSFER_AP_CORE_NUMBER TRUE
#endif
-#if AGESA_ENTRY_INIT_RECOVERY == TRUE
- #undef ID_POSITION_INITIAL_APICID
- #define ID_POSITION_INITIAL_APICID TRUE
- #undef USES_REGISTER_TABLES
- #define USES_REGISTER_TABLES TRUE
- #undef BASE_FAMILY_PCI
- #define BASE_FAMILY_PCI TRUE
- #undef MODEL_SPECIFIC_PCI
- #define MODEL_SPECIFIC_PCI TRUE
- #undef BASE_FAMILY_MSR
- #define BASE_FAMILY_MSR TRUE
- #undef MODEL_SPECIFIC_MSR
- #define MODEL_SPECIFIC_MSR TRUE
- #undef GET_CACHE_INFO
- #define GET_CACHE_INFO TRUE
- #undef GET_PLATFORM_TYPE_SPECIFIC_INFO
- #define GET_PLATFORM_TYPE_SPECIFIC_INFO TRUE
- #undef IS_NB_PSTATE_ENABLED
- #define IS_NB_PSTATE_ENABLED TRUE
- #undef GET_PATCHES
- #define GET_PATCHES TRUE
- #undef GET_PATCHES_EQUIVALENCE_TABLE
- #define GET_PATCHES_EQUIVALENCE_TABLE TRUE
-#endif
-
#if AGESA_ENTRY_INIT_EARLY == TRUE
#undef TRANSITION_PSTATE
#define TRANSITION_PSTATE TRUE
diff --git a/src/vendorcode/amd/agesa/f15/Config/OptionFamily10hInstall.h b/src/vendorcode/amd/agesa/f15/Config/OptionFamily10hInstall.h
index 7eeea69c9f..cb30a7fb56 100644
--- a/src/vendorcode/amd/agesa/f15/Config/OptionFamily10hInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Config/OptionFamily10hInstall.h
@@ -372,8 +372,6 @@ extern F_GET_EARLY_INIT_TABLE GetF10EarlyInitOnCoreTable;
#define F10_BL_UCODE_C6
#define F10_BL_UCODE_C8
- // If a patch is required for recovery mode to function properly, add a
- // conditional for AGESA_ENTRY_INIT_RECOVERY, and pull it in.
#if AGESA_ENTRY_INIT_EARLY == TRUE
#if OPTION_AM3_SOCKET_SUPPORT == TRUE
extern CONST MICROCODE_PATCHES ROMDATA CpuF10MicrocodePatch010000c6;
diff --git a/src/vendorcode/amd/agesa/f15/Config/OptionIdsInstall.h b/src/vendorcode/amd/agesa/f15/Config/OptionIdsInstall.h
index 6873370a55..6fa09e98dd 100644
--- a/src/vendorcode/amd/agesa/f15/Config/OptionIdsInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Config/OptionIdsInstall.h
@@ -78,13 +78,6 @@ CONST PF_HtIdsGetPortOverride ROMDATA pf_HtIdsGetPortOverride = M_HTIDS_PORT_OVE
{ (UINTN) MemUReadCachelines, "ReadCl(BufferAddr,PhyAddrLo,ClCnt)"},
{ (UINTN) MemUFlushPattern, "FlushCl(PhyAddrLo,ClCnt)"}
};
- #elif (AGESA_ENTRY_INIT_RECOVERY == TRUE)
- #include <mru.h>
- CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = {
- { (UINTN) MemRecUWrite1CL, "Write1Cl(PhyAddrLo,BufferAddr)"},
- { (UINTN) MemRecURead1CL, "Read1Cl(BufferAddr,PhyAddrLo)"},
- { (UINTN) MemRecUFlushPattern, "Flush1Cl(PhyAddrLo)"}
- };
#else
CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = {
{ (UINTN) CommonReturnFalse, "DefRet()"},
diff --git a/src/vendorcode/amd/agesa/f15/Config/OptionMemoryRecoveryInstall.h b/src/vendorcode/amd/agesa/f15/Config/OptionMemoryRecoveryInstall.h
deleted file mode 100644
index f5dea81d33..0000000000
--- a/src/vendorcode/amd/agesa/f15/Config/OptionMemoryRecoveryInstall.h
+++ /dev/null
@@ -1,263 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Install of build option: Memory
- *
- * Contains AMD AGESA install macros and test conditions. Output is the
- * defaults tables reflecting the User's build options selection.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Options
- * @e \$Revision: 54577 $ @e \$Date: 2011-06-09 04:28:28 -0600 (Thu, 09 Jun 2011) $
- */
-/*****************************************************************************
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *
- ***************************************************************************/
-
-#ifndef _OPTION_MEMORY_RECOVERY_INSTALL_H_
-#define _OPTION_MEMORY_RECOVERY_INSTALL_H_
-
-#if (AGESA_ENTRY_INIT_RECOVERY == TRUE)
-
- #if (OPTION_MEMCTLR_DR == TRUE)
- extern MEM_REC_NB_CONSTRUCTOR MemRecConstructNBBlockDR;
- #define MEM_REC_NB_SUPPORT_DR MemRecConstructNBBlockDR,
- #else
- #define MEM_REC_NB_SUPPORT_DR
- #endif
- #if (OPTION_MEMCTLR_RB == TRUE)
- extern MEM_REC_NB_CONSTRUCTOR MemRecConstructNBBlockRb;
- #define MEM_REC_NB_SUPPORT_RB MemRecConstructNBBlockRb,
- #else
- #define MEM_REC_NB_SUPPORT_RB
- #endif
- #if (OPTION_MEMCTLR_DA == TRUE)
- extern MEM_REC_NB_CONSTRUCTOR MemRecConstructNBBlockDA;
- #define MEM_REC_NB_SUPPORT_DA MemRecConstructNBBlockDA,
- #else
- #define MEM_REC_NB_SUPPORT_DA
- #endif
- #if (OPTION_MEMCTLR_NI == TRUE)
- extern MEM_REC_NB_CONSTRUCTOR MemRecConstructNBBlockNi;
- #define MEM_REC_NB_SUPPORT_NI MemRecConstructNBBlockNi,
- #else
- #define MEM_REC_NB_SUPPORT_NI
- #endif
- #if (OPTION_MEMCTLR_PH == TRUE)
- extern MEM_REC_NB_CONSTRUCTOR MemRecConstructNBBlockPh;
- #define MEM_REC_NB_SUPPORT_PH MemRecConstructNBBlockPh,
- #else
- #define MEM_REC_NB_SUPPORT_PH
- #endif
- #if (OPTION_MEMCTLR_HY == TRUE)
- extern MEM_REC_NB_CONSTRUCTOR MemRecConstructNBBlockHY;
- #define MEM_REC_NB_SUPPORT_HY MemRecConstructNBBlockHY,
- #else
- #define MEM_REC_NB_SUPPORT_HY
- #endif
- #if (OPTION_MEMCTLR_C32 == TRUE)
- extern MEM_REC_NB_CONSTRUCTOR MemRecConstructNBBlockC32;
- #define MEM_REC_NB_SUPPORT_C32 MemRecConstructNBBlockC32,
- #else
- #define MEM_REC_NB_SUPPORT_C32
- #endif
- #if (OPTION_MEMCTLR_OR == TRUE)
- extern MEM_REC_NB_CONSTRUCTOR MemRecConstructNBBlockOr;
- #define MEM_REC_NB_SUPPORT_OR MemRecConstructNBBlockOr,
- #else
- #define MEM_REC_NB_SUPPORT_OR
- #endif
-
- MEM_REC_NB_CONSTRUCTOR* MemRecNBInstalled[] = {
- MEM_REC_NB_SUPPORT_DR
- MEM_REC_NB_SUPPORT_RB
- MEM_REC_NB_SUPPORT_DA
- MEM_REC_NB_SUPPORT_PH
- MEM_REC_NB_SUPPORT_HY
- MEM_REC_NB_SUPPORT_C32
- MEM_REC_NB_SUPPORT_OR
- MEM_REC_NB_SUPPORT_NI
- NULL
- };
-
- #define MEM_REC_TECH_CONSTRUCTOR_DDR2
- #if (OPTION_DDR3 == TRUE)
- extern MEM_REC_TECH_CONSTRUCTOR MemRecConstructTechBlock3;
- #define MEM_REC_TECH_CONSTRUCTOR_DDR3 MemRecConstructTechBlock3,
- #else
- #define MEM_REC_TECH_CONSTRUCTOR_DDR3
- #endif
-
- MEM_REC_TECH_CONSTRUCTOR* MemRecTechInstalled[] = {
- MEM_REC_TECH_CONSTRUCTOR_DDR3
- MEM_REC_TECH_CONSTRUCTOR_DDR2
- NULL
- };
-
- #if OPTION_MEMCTLR_DR
- #define PSC_REC_DR_UDIMM_DDR2
- #define PSC_REC_DR_UDIMM_DDR3 MemRecNGetPsCfgUDIMM3Nb,
- #define PSC_REC_DR_RDIMM_DDR2
- #define PSC_REC_DR_RDIMM_DDR3 MemRecNGetPsCfgRDIMM3Nb,
- #define PSC_REC_DR_SODIMM_DDR2
- #define PSC_REC_DR_SODIMM_DDR3 MemRecNGetPsCfgSODIMM3Nb,
- #endif
- #if ((OPTION_MEMCTLR_DA == TRUE) || (OPTION_MEMCTLR_Ni == TRUE) || (OPTION_MEMCTLR_PH == TRUE) || (OPTION_MEMCTLR_RB == TRUE))
- #define PSC_REC_DA_UDIMM_DDR3 MemRecNGetPsCfgUDIMM3Nb,
- #define PSC_REC_DA_SODIMM_DDR2
- #define PSC_REC_DA_SODIMM_DDR3 MemRecNGetPsCfgSODIMM3Nb,
- #endif
- #if OPTION_MEMCTLR_HY
- #define PSC_REC_HY_UDIMM_DDR3 MemRecNGetPsCfgUDIMM3Nb,
- #define PSC_REC_HY_RDIMM_DDR3 MemRecNGetPsCfgRDIMM3Nb,
- #endif
- #if OPTION_MEMCTLR_C32
- #define PSC_REC_C32_UDIMM_DDR3 MemRecNGetPsCfgUDIMM3Nb,
- #define PSC_REC_C32_RDIMM_DDR3 MemRecNGetPsCfgRDIMM3Nb,
- #endif
- #if OPTION_MEMCTLR_OR
- #define PSC_REC_OR_UDIMM_DDR3 //MemRecNGetPsCfgUDIMM3OR,
- #define PSC_REC_OR_RDIMM_DDR3 //MemRecNGetPsCfgRDIMM3OR,
- #endif
-
- #ifndef PSC_REC_DR_UDIMM_DDR2
- #define PSC_REC_DR_UDIMM_DDR2
- #endif
- #ifndef PSC_REC_DR_UDIMM_DDR3
- #define PSC_REC_DR_UDIMM_DDR3
- #endif
- #ifndef PSC_REC_DR_RDIMM_DDR2
- #define PSC_REC_DR_RDIMM_DDR2
- #endif
- #ifndef PSC_REC_DR_RDIMM_DDR3
- #define PSC_REC_DR_RDIMM_DDR3
- #endif
- #ifndef PSC_REC_DR_SODIMM_DDR2
- #define PSC_REC_DR_SODIMM_DDR2
- #endif
- #ifndef PSC_REC_DR_SODIMM_DDR3
- #define PSC_REC_DR_SODIMM_DDR3
- #endif
- #ifndef PSC_REC_DA_UDIMM_DDR3
- #define PSC_REC_DA_UDIMM_DDR3
- #endif
- #ifndef PSC_REC_DA_SODIMM_DDR2
- #define PSC_REC_DA_SODIMM_DDR2
- #endif
- #ifndef PSC_REC_DA_SODIMM_DDR3
- #define PSC_REC_DA_SODIMM_DDR3
- #endif
- #ifndef PSC_REC_HY_UDIMM_DDR3
- #define PSC_REC_HY_UDIMM_DDR3
- #endif
- #ifndef PSC_REC_HY_RDIMM_DDR3
- #define PSC_REC_HY_RDIMM_DDR3
- #endif
- #ifndef PSC_REC_C32_UDIMM_DDR3
- #define PSC_REC_C32_UDIMM_DDR3
- #endif
- #ifndef PSC_REC_C32_RDIMM_DDR3
- #define PSC_REC_C32_RDIMM_DDR3
- #endif
- #ifndef PSC_REC_OR_UDIMM_DDR3
- #define PSC_REC_OR_UDIMM_DDR3
- #endif
- #ifndef PSC_REC_OR_RDIMM_DDR3
- #define PSC_REC_OR_RDIMM_DDR3
- #endif
-
- MEM_PLATFORM_CFG* memRecPlatformTypeInstalled[] = {
- PSC_REC_DR_UDIMM_DDR2
- PSC_REC_DR_RDIMM_DDR2
- PSC_REC_DR_SODIMM_DDR2
- PSC_REC_DR_UDIMM_DDR3
- PSC_REC_DR_RDIMM_DDR3
- PSC_REC_DR_SODIMM_DDR3
- PSC_REC_DA_SODIMM_DDR2
- PSC_REC_DA_UDIMM_DDR3
- PSC_REC_DA_SODIMM_DDR3
- PSC_REC_HY_UDIMM_DDR3
- PSC_REC_HY_RDIMM_DDR3
- PSC_REC_C32_UDIMM_DDR3
- PSC_REC_C32_RDIMM_DDR3
- PSC_REC_OR_UDIMM_DDR3
- PSC_REC_OR_RDIMM_DDR3
- NULL
- };
-
- /*---------------------------------------------------------------------------------------------------
- * EXTRACTABLE PLATFORM SPECIFIC CONFIGURATION
- *
- *
- *---------------------------------------------------------------------------------------------------
- */
- #define MEM_PSC_REC_FLOW_BLOCK_END NULL
- #define PSC_REC_TBL_END NULL
- #define MEM_REC_PSC_FLOW_DEFTRUE (BOOLEAN (*) (MEM_NB_BLOCK*, MEM_PSC_TABLE_BLOCK *)) MemRecDefTrue
-
-
-#else
- /*---------------------------------------------------------------------------------------------------
- * DEFAULT TECHNOLOGY BLOCK
- *
- *
- *---------------------------------------------------------------------------------------------------
- */
- MEM_TECH_CONSTRUCTOR* MemRecTechInstalled[] = { // Types of technology installed
- NULL
- };
- /*---------------------------------------------------------------------------------------------------
- * DEFAULT NORTHBRIDGE SUPPORT LIST
- *
- *
- *---------------------------------------------------------------------------------------------------
- */
- MEM_REC_NB_CONSTRUCTOR* MemRecNBInstalled[] = {
- NULL
- };
- /*----------------------------------------------------------------------
- * DEFAULT PSCFG DEFINITIONS
- *
- *----------------------------------------------------------------------
- */
- MEM_PLATFORM_CFG* memRecPlatformTypeInstalled[] = {
- NULL
- };
- /*----------------------------------------------------------------------
- * EXTRACTABLE PLATFORM SPECIFIC CONFIGURATION
- *
- *----------------------------------------------------------------------
- */
- MEM_PSC_FLOW_BLOCK* memRecPlatSpecFlowArray[] = {
- NULL
- };
-#endif
-#endif // _OPTION_MEMORY_RECOVERY_INSTALL_H_
diff --git a/src/vendorcode/amd/agesa/f15/Config/PlatformInstall.h b/src/vendorcode/amd/agesa/f15/Config/PlatformInstall.h
index 54f180a94a..31645c3a15 100644
--- a/src/vendorcode/amd/agesa/f15/Config/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Config/PlatformInstall.h
@@ -2201,8 +2201,6 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#include "OptionHtInstall.h"
#include "OptionMemory.h"
#include "OptionMemoryInstall.h"
-#include "OptionMemoryRecovery.h"
-#include "OptionMemoryRecoveryInstall.h"
#include "OptionCpuFeaturesInstall.h"
#include "OptionDmi.h"
#include "OptionDmiInstall.h"