diff options
| author | efdesign98 <efdesign98@gmail.com> | 2011-08-04 12:09:17 -0600 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2011-08-06 18:06:18 +0200 |
| commit | 84cbce2364cf3e40f24ba37b2f72a711a2e50f58 (patch) | |
| tree | 57c26631dd5c9df392e6c515b0855ef403f1e186 /src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14 | |
| parent | 0df0e14fb5b613e76ff022359c55d5df5633b40f (diff) | |
Update AMD F14 Agesa to support Rev C0 cpus
This change updates the AMD Agesa code to support the Family 14
rev C0 cpus. It also fixes (again) a ton of warnings, although
not all of them are gone. The warning fixes affect code in the
Family 12 tree as well, so there are some small changes therein.
This code has been tested on a Persimmon and passes Abuild.
This is the first (and largest) of a number of commits to complete
the upgrade.
Change-Id: Id28d9bf7931f8baa2a602f6bb096a5a465ccd20d
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/131
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14')
9 files changed, 850 insertions, 570 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c index e23cc7c543..ef6fae742d 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c @@ -9,7 +9,7 @@ * @xrefitem bom "File Content Label" "Release Content" * @e project: AGESA * @e sub-project: GNB - * @e \$Revision: 39275 $ @e \$Date: 2010-10-09 08:22:05 +0800 (Sat, 09 Oct 2010) $ + * @e \$Revision: 46946 $ @e \$Date: 2011-02-11 11:53:30 -0700 (Fri, 11 Feb 2011) $ * */ /* @@ -50,6 +50,13 @@ */ #include "AGESA.h" #include "Ids.h" +#include "heapManager.h" +#include "Gnb.h" +//#include "GnbPcieFamServices.h" +#include "GnbFuseTable.h" +#include "GnbRegistersON.h" +#include "cpuLateInit.h" +#include GNB_MODULE_DEFINITIONS (GnbCommonLib) #include "F14PcieAlibSsdt.h" #include "Filecode.h" #define FILECODE PROC_GNB_PCIE_FAMILY_0X14_F14PCIEALIB_FILECODE @@ -69,4 +76,63 @@ * P R O T O T Y P E S O F L O C A L F U N C T I O N S *---------------------------------------------------------------------------------------- */ +AGESA_STATUS +PcieFmAlibBuildAcpiTable ( + IN VOID *AlibSsdtPtr, + IN AMD_CONFIG_PARAMS *StdHeader + ); +/*----------------------------------------------------------------------------------------*/ +/** + * Build ALIB ACPI table + * + * + * + * @param[in,out] AlibSsdtPtr Pointer to ALIB SSDT table + * @param[in] StdHeader Standard Configuration Header + * @retval AGESA_SUCCESS + * @retval AGESA_FATAL + */ + +AGESA_STATUS +PcieFmAlibBuildAcpiTable ( + IN VOID *AlibSsdtPtr, + IN AMD_CONFIG_PARAMS *StdHeader + ) +{ + AGESA_STATUS AgesaStatus; + D18F4x15C_STRUCT D18F4x15C; + PP_FUSE_ARRAY *PpFuseArray; + UINT32 AmlObjName; + VOID *AmlObjPtr; + + IDS_HDT_CONSOLE (GNB_TRACE, "PcieFmAlibBuildAcpiTable Enter\n"); + AgesaStatus = AGESA_SUCCESS; + // Set voltage configuration + PpFuseArray = GnbLocateHeapBuffer (AMD_PP_FUSE_TABLE_HANDLE, StdHeader); + ASSERT (PpFuseArray != NULL); + if (PpFuseArray != NULL) { + GnbLibPciRead ( + MAKE_SBDFO (0, 0, 0x18, 0x4, D18F4x15C_ADDRESS), + AccessWidth32, + &D18F4x15C.Value, + StdHeader + ); + if (D18F4x15C.Field.BoostSrc != 0 || PpFuseArray->GpuBoostCap != 0) { +// AmlObjName = 'B0DA'; + AmlObjName = Int32FromChar ('B', '0', 'D', 'A'); + AmlObjPtr = GnbLibFind (AlibSsdtPtr, ((ACPI_TABLE_HEADER*) &AlibSsdt[0])->TableLength, (UINT8*) &AmlObjName, sizeof (AmlObjName)); + ASSERT (AmlObjPtr != NULL); + if (AmlObjPtr != NULL) { + *(UINT8*)((UINT8*) AmlObjPtr + 5) = 1; + } else { + AgesaStatus = AGESA_FATAL; + } + } + } else { + AgesaStatus = AGESA_FATAL; + } + + IDS_HDT_CONSOLE (GNB_TRACE, "PcieFmAlibBuildAcpiTable Exit[0x%x]\n", AgesaStatus); + return AgesaStatus; +} diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.esl b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.esl index d33c341048..fbfea63d62 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.esl +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.esl @@ -97,6 +97,7 @@ DefinitionBlock ( } } +#ifdef PCIE_PHY_LANE_POWER_GATE_SUPPORT /*----------------------------------------------------------------------------------------*/ /** * Power gate PCIe phy lanes (hotplug support) @@ -108,10 +109,10 @@ DefinitionBlock ( Method (procPcieLanePowerControl, 3, NotSerialized) { // stub function } - +#endif /*----------------------------------------------------------------------------------------*/ /** - * Read RCU register + * Adjust PLL settings stub * * Arg0 - 1 - GEN1 2 - GEN2 * @@ -119,7 +120,26 @@ DefinitionBlock ( Method (procPcieAdjustPll, 1, NotSerialized) { //stub function } - + Name (AD0B, 0) + /*----------------------------------------------------------------------------------------*/ + /** + * APM/PDM stub + * + * Arg0 - 0 (AC) 1 (DC) + * + */ + Method (procApmPdmActivate, 1, NotSerialized) { + if (LEqual (AD0B, 1)) { + Store (Or(ShiftLeft (0x18, 3), 4), Local1) + Store (procPciDwordRead (Local1, 0x15C), Local2) + if (LEqual (Arg0, DEF_PSPP_STATE_AC)) { + Or (Local2, 0x01, Local2) + } else { + And (Local2, 0xfffffffc, Local2) + } + procPciDwordWrite (Local1, 0x15C, Local2) + } + } } //End of Scope(\_SB) } //End of DefinitionBlock diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h index 533521b4a3..0fb3b9155c 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h @@ -12,51 +12,51 @@ * */ /* - ***************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * *************************************************************************** - * - */ +***************************************************************************** +* +* Copyright (c) 2011, Advanced Micro Devices, Inc. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of Advanced Micro Devices, Inc. nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +**************************************************************************** +* +*/ #ifndef _F14PCIEALIBSSDT_H_ #define _F14PCIEALIBSSDT_H_ UINT8 AlibSsdt[] = { - 0x53, 0x53, 0x44, 0x54, 0xFA, 0x12, 0x00, 0x00, - 0x02, 0xC9, 0x41, 0x4D, 0x44, 0x00, 0x00, 0x00, + 0x53, 0x53, 0x44, 0x54, 0x8E, 0x16, 0x00, 0x00, + 0x02, 0x11, 0x41, 0x4D, 0x44, 0x00, 0x00, 0x00, 0x41, 0x4C, 0x49, 0x42, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53, 0x46, 0x54, - 0x00, 0x00, 0x00, 0x04, 0x10, 0x85, 0x2D, 0x01, + 0x00, 0x00, 0x00, 0x04, 0x10, 0x89, 0x66, 0x01, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x08, 0x41, 0x30, 0x30, 0x31, 0x0A, 0x06, 0x08, 0x41, 0x44, 0x30, 0x31, 0x0C, 0x00, 0x00, 0x00, 0xE0, 0x06, 0x41, - 0x44, 0x30, 0x31, 0x41, 0x30, 0x39, 0x31, 0x08, - 0x41, 0x44, 0x30, 0x37, 0x12, 0x45, 0x06, 0x07, + 0x44, 0x30, 0x31, 0x41, 0x30, 0x38, 0x36, 0x08, + 0x41, 0x44, 0x30, 0x37, 0x12, 0x43, 0x07, 0x08, 0x11, 0x0D, 0x0A, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x0D, 0x0A, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -69,81 +69,84 @@ UINT8 AlibSsdt[] = { 0x0A, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x0D, 0x0A, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x06, 0x41, 0x44, 0x30, 0x37, 0x41, - 0x30, 0x39, 0x32, 0x14, 0x41, 0x05, 0x41, 0x4C, + 0x00, 0x00, 0x11, 0x0D, 0x0A, 0x0A, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x06, 0x41, 0x44, 0x30, 0x37, 0x41, 0x30, 0x38, + 0x37, 0x08, 0x41, 0x30, 0x38, 0x38, 0x11, 0x04, + 0x0B, 0x00, 0x01, 0x14, 0x41, 0x05, 0x41, 0x4C, 0x49, 0x42, 0x02, 0xA0, 0x0B, 0x93, 0x68, 0x0A, - 0x01, 0xA4, 0x41, 0x30, 0x31, 0x38, 0x69, 0xA0, + 0x01, 0xA4, 0x41, 0x30, 0x32, 0x36, 0x69, 0xA0, 0x0B, 0x93, 0x68, 0x0A, 0x02, 0xA4, 0x41, 0x30, - 0x32, 0x31, 0x69, 0xA0, 0x0B, 0x93, 0x68, 0x0A, - 0x03, 0xA4, 0x41, 0x30, 0x33, 0x32, 0x69, 0xA0, + 0x33, 0x30, 0x69, 0xA0, 0x0B, 0x93, 0x68, 0x0A, + 0x03, 0xA4, 0x41, 0x30, 0x34, 0x31, 0x69, 0xA0, 0x0B, 0x93, 0x68, 0x0A, 0x04, 0xA4, 0x41, 0x30, - 0x36, 0x33, 0x69, 0xA0, 0x0A, 0x93, 0x68, 0x0A, - 0x05, 0xA4, 0x41, 0x30, 0x39, 0x33, 0xA0, 0x0B, + 0x36, 0x36, 0x69, 0xA0, 0x0A, 0x93, 0x68, 0x0A, + 0x05, 0xA4, 0x41, 0x30, 0x38, 0x39, 0xA0, 0x0B, 0x93, 0x68, 0x0A, 0x06, 0xA4, 0x41, 0x30, 0x36, - 0x36, 0x69, 0xA4, 0x0A, 0x00, 0x14, 0x09, 0x41, - 0x30, 0x39, 0x33, 0x08, 0xA4, 0x0A, 0x00, 0x14, - 0x31, 0x41, 0x30, 0x33, 0x31, 0x02, 0x72, 0x41, - 0x30, 0x39, 0x31, 0x79, 0x68, 0x0A, 0x0C, 0x00, + 0x39, 0x69, 0xA4, 0x0A, 0x00, 0x14, 0x09, 0x41, + 0x30, 0x38, 0x39, 0x08, 0xA4, 0x0A, 0x00, 0x14, + 0x31, 0x41, 0x30, 0x30, 0x37, 0x0A, 0x72, 0x41, + 0x30, 0x38, 0x36, 0x79, 0x68, 0x0A, 0x0C, 0x00, 0x60, 0x72, 0x69, 0x60, 0x60, 0x5B, 0x80, 0x41, - 0x30, 0x39, 0x34, 0x00, 0x60, 0x0A, 0x04, 0x5B, - 0x81, 0x0B, 0x41, 0x30, 0x39, 0x34, 0x03, 0x41, - 0x30, 0x39, 0x35, 0x20, 0xA4, 0x41, 0x30, 0x39, - 0x35, 0x14, 0x32, 0x41, 0x30, 0x35, 0x39, 0x03, - 0x72, 0x41, 0x30, 0x39, 0x31, 0x79, 0x68, 0x0A, + 0x30, 0x39, 0x30, 0x00, 0x60, 0x0A, 0x04, 0x5B, + 0x81, 0x0B, 0x41, 0x30, 0x39, 0x30, 0x03, 0x41, + 0x30, 0x39, 0x31, 0x20, 0xA4, 0x41, 0x30, 0x39, + 0x31, 0x14, 0x32, 0x41, 0x30, 0x30, 0x38, 0x0B, + 0x72, 0x41, 0x30, 0x38, 0x36, 0x79, 0x68, 0x0A, 0x0C, 0x00, 0x60, 0x72, 0x69, 0x60, 0x60, 0x5B, - 0x80, 0x41, 0x30, 0x39, 0x34, 0x00, 0x60, 0x0A, - 0x04, 0x5B, 0x81, 0x0B, 0x41, 0x30, 0x39, 0x34, - 0x03, 0x41, 0x30, 0x39, 0x35, 0x20, 0x70, 0x6A, - 0x41, 0x30, 0x39, 0x35, 0x14, 0x1C, 0x41, 0x30, - 0x35, 0x35, 0x04, 0x70, 0x41, 0x30, 0x33, 0x31, + 0x80, 0x41, 0x30, 0x39, 0x30, 0x00, 0x60, 0x0A, + 0x04, 0x5B, 0x81, 0x0B, 0x41, 0x30, 0x39, 0x30, + 0x03, 0x41, 0x30, 0x39, 0x31, 0x20, 0x70, 0x6A, + 0x41, 0x30, 0x39, 0x31, 0x14, 0x1C, 0x41, 0x30, + 0x35, 0x32, 0x0C, 0x70, 0x41, 0x30, 0x30, 0x37, 0x68, 0x69, 0x60, 0x7D, 0x7B, 0x60, 0x6A, 0x00, - 0x6B, 0x60, 0x41, 0x30, 0x35, 0x39, 0x68, 0x69, - 0x60, 0x5B, 0x01, 0x41, 0x30, 0x39, 0x36, 0x00, - 0x14, 0x32, 0x41, 0x30, 0x35, 0x38, 0x02, 0x5B, - 0x23, 0x41, 0x30, 0x39, 0x36, 0xFF, 0xFF, 0x70, + 0x6B, 0x60, 0x41, 0x30, 0x30, 0x38, 0x68, 0x69, + 0x60, 0x5B, 0x01, 0x41, 0x30, 0x39, 0x32, 0x00, + 0x14, 0x32, 0x41, 0x30, 0x35, 0x33, 0x02, 0x5B, + 0x23, 0x41, 0x30, 0x39, 0x32, 0xFF, 0xFF, 0x70, 0x79, 0x72, 0x68, 0x0A, 0x02, 0x00, 0x0A, 0x03, - 0x00, 0x60, 0x41, 0x30, 0x35, 0x39, 0x60, 0x0A, - 0xE0, 0x69, 0x70, 0x41, 0x30, 0x33, 0x31, 0x60, + 0x00, 0x60, 0x41, 0x30, 0x30, 0x38, 0x60, 0x0A, + 0xE0, 0x69, 0x70, 0x41, 0x30, 0x30, 0x37, 0x60, 0x0A, 0xE4, 0x60, 0x5B, 0x27, 0x41, 0x30, 0x39, - 0x36, 0xA4, 0x60, 0x14, 0x2F, 0x41, 0x30, 0x39, - 0x37, 0x03, 0x5B, 0x23, 0x41, 0x30, 0x39, 0x36, + 0x32, 0xA4, 0x60, 0x14, 0x2F, 0x41, 0x30, 0x39, + 0x33, 0x03, 0x5B, 0x23, 0x41, 0x30, 0x39, 0x32, 0xFF, 0xFF, 0x70, 0x79, 0x72, 0x68, 0x0A, 0x02, - 0x00, 0x0A, 0x03, 0x00, 0x60, 0x41, 0x30, 0x35, - 0x39, 0x60, 0x0A, 0xE0, 0x69, 0x41, 0x30, 0x35, - 0x39, 0x60, 0x0A, 0xE4, 0x6A, 0x5B, 0x27, 0x41, - 0x30, 0x39, 0x36, 0x14, 0x1C, 0x41, 0x30, 0x35, - 0x34, 0x04, 0x70, 0x41, 0x30, 0x35, 0x38, 0x68, + 0x00, 0x0A, 0x03, 0x00, 0x60, 0x41, 0x30, 0x30, + 0x38, 0x60, 0x0A, 0xE0, 0x69, 0x41, 0x30, 0x30, + 0x38, 0x60, 0x0A, 0xE4, 0x6A, 0x5B, 0x27, 0x41, + 0x30, 0x39, 0x32, 0x14, 0x1C, 0x41, 0x30, 0x35, + 0x30, 0x04, 0x70, 0x41, 0x30, 0x35, 0x33, 0x68, 0x69, 0x60, 0x7D, 0x7B, 0x60, 0x6A, 0x00, 0x6B, - 0x60, 0x41, 0x30, 0x39, 0x37, 0x68, 0x69, 0x60, - 0x5B, 0x01, 0x41, 0x30, 0x39, 0x38, 0x00, 0x14, - 0x29, 0x41, 0x30, 0x36, 0x31, 0x03, 0x5B, 0x23, - 0x41, 0x30, 0x39, 0x38, 0xFF, 0xFF, 0x41, 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0x41, + 0x30, 0x30, 0x38, 0x68, 0x72, 0x69, 0x0A, 0x04, + 0x00, 0x6B, 0x5B, 0x27, 0x41, 0x30, 0x39, 0x34, + 0x14, 0x1E, 0x41, 0x30, 0x32, 0x38, 0x05, 0x70, + 0x41, 0x30, 0x34, 0x32, 0x68, 0x69, 0x6A, 0x60, 0x7D, 0x7B, 0x60, 0x6B, 0x00, 0x6C, 0x60, 0x41, - 0x30, 0x36, 0x32, 0x68, 0x69, 0x6A, 0x60, 0x14, + 0x30, 0x34, 0x33, 0x68, 0x69, 0x6A, 0x60, 0x14, 0x0F, 0x41, 0x30, 0x37, 0x33, 0x01, 0xA4, 0x83, - 0x88, 0x41, 0x30, 0x39, 0x32, 0x68, 0x00, 0x14, - 0x42, 0x05, 0x41, 0x30, 0x35, 0x36, 0x02, 0x70, + 0x88, 0x41, 0x30, 0x38, 0x37, 0x68, 0x00, 0x14, + 0x42, 0x05, 0x41, 0x30, 0x35, 0x39, 0x02, 0x70, 0x0A, 0x34, 0x61, 0xA0, 0x11, 0x93, 0x41, 0x30, - 0x33, 0x31, 0x68, 0x0A, 0x00, 0x0C, 0xFF, 0xFF, + 0x30, 0x37, 0x68, 0x0A, 0x00, 0x0C, 0xFF, 0xFF, 0xFF, 0xFF, 0xA4, 0x0A, 0x00, 0x70, 0x0A, 0x01, 0x60, 0xA2, 0x2E, 0x93, 0x60, 0x0A, 0x01, 0x70, - 0x7B, 0x41, 0x30, 0x33, 0x31, 0x68, 0x61, 0x0A, - 0xFF, 0x00, 0x61, 0xA0, 0x1C, 0x92, 0x93, 0x61, - 0x0A, 0x00, 0xA0, 0x11, 0x93, 0x7B, 0x41, 0x30, - 0x33, 0x31, 0x68, 0x61, 0x0A, 0xFF, 0x00, 0x69, + 0x7B, 0x41, 0x30, 0x30, 0x37, 0x68, 0x61, 0x0A, + 0xFF, 0x00, 0x61, 0xA0, 0x06, 0x93, 0x61, 0x0A, + 0x00, 0xA5, 0xA0, 0x11, 0x93, 0x7B, 0x41, 0x30, + 0x30, 0x37, 0x68, 0x61, 0x0A, 0xFF, 0x00, 0x69, 0x70, 0x0A, 0x00, 0x60, 0xA1, 0x03, 0x75, 0x61, 0xA4, 0x61, 0x14, 0x47, 0x09, 0x41, 0x30, 0x35, - 0x37, 0x02, 0x5B, 0x80, 0x50, 0x4D, 0x49, 0x4F, + 0x38, 0x0A, 0x5B, 0x80, 0x50, 0x4D, 0x49, 0x4F, 0x01, 0x0B, 0xD6, 0x0C, 0x0A, 0x02, 0x5B, 0x81, 0x10, 0x50, 0x4D, 0x49, 0x4F, 0x01, 0x50, 0x4D, 0x52, 0x49, 0x08, 0x50, 0x4D, 0x52, 0x44, 0x08, @@ -162,18 +165,18 @@ UINT8 AlibSsdt[] = { 0x60, 0x7D, 0x7B, 0x60, 0x0C, 0xFC, 0xFF, 0xFF, 0xFF, 0x00, 0x68, 0x60, 0x70, 0x60, 0x41, 0x42, 0x44, 0x41, 0x14, 0x48, 0x05, 0x41, 0x30, 0x38, - 0x36, 0x01, 0x70, 0x41, 0x30, 0x36, 0x31, 0x0A, + 0x31, 0x01, 0x70, 0x41, 0x30, 0x34, 0x32, 0x0A, 0x00, 0x0A, 0x60, 0x0A, 0xCD, 0x60, 0x75, 0x68, 0x7D, 0x7B, 0x60, 0x0C, 0xFF, 0xFF, 0xFF, 0xFE, 0x00, 0x7B, 0x80, 0x7B, 0x60, 0x0C, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x01, 0x00, 0x60, 0x7D, 0x7B, 0x60, 0x0C, 0xFF, 0xFF, 0x00, 0xFD, 0x00, 0x79, 0x68, 0x0A, 0x10, - 0x00, 0x60, 0x41, 0x30, 0x36, 0x32, 0x0A, 0x00, + 0x00, 0x60, 0x41, 0x30, 0x34, 0x33, 0x0A, 0x00, 0x0A, 0x60, 0x0A, 0xCD, 0x60, 0x70, 0x41, 0x30, - 0x36, 0x31, 0x0A, 0x00, 0x0A, 0x60, 0x0A, 0xCE, + 0x34, 0x32, 0x0A, 0x00, 0x0A, 0x60, 0x0A, 0xCE, 0x60, 0xA4, 0x60, 0x14, 0x47, 0x0A, 0x41, 0x30, - 0x38, 0x37, 0x03, 0x70, 0x41, 0x30, 0x36, 0x31, + 0x38, 0x32, 0x03, 0x70, 0x41, 0x30, 0x34, 0x32, 0x0A, 0x00, 0x0A, 0x60, 0x0A, 0xCD, 0x60, 0x70, 0x7B, 0x69, 0x0B, 0xFF, 0xFF, 0x00, 0x61, 0x7D, 0x7B, 0x60, 0x0C, 0xFF, 0xFF, 0xFF, 0xFE, 0x00, @@ -182,8 +185,8 @@ UINT8 AlibSsdt[] = { 0x00, 0x60, 0x7D, 0x7B, 0x60, 0x0C, 0x00, 0x00, 0x00, 0xFD, 0x00, 0x79, 0x68, 0x0A, 0x10, 0x00, 0x60, 0x7D, 0x60, 0x0C, 0x00, 0x00, 0x00, 0x02, - 0x60, 0x7D, 0x60, 0x61, 0x60, 0x41, 0x30, 0x36, - 0x32, 0x0A, 0x00, 0x0A, 0x60, 0x0A, 0xCD, 0x60, + 0x60, 0x7D, 0x60, 0x61, 0x60, 0x41, 0x30, 0x34, + 0x33, 0x0A, 0x00, 0x0A, 0x60, 0x0A, 0xCD, 0x60, 0xA0, 0x4A, 0x04, 0x93, 0x6A, 0x0A, 0x01, 0x70, 0x7A, 0x69, 0x0A, 0x10, 0x00, 0x61, 0x7D, 0x7B, 0x60, 0x0C, 0xFF, 0xFF, 0xFF, 0xFE, 0x00, 0x7B, @@ -192,25 +195,25 @@ UINT8 AlibSsdt[] = { 0x60, 0x7D, 0x7B, 0x60, 0x0C, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x79, 0x72, 0x68, 0x0A, 0x01, 0x00, 0x0A, 0x10, 0x00, 0x60, 0x7D, 0x60, 0x61, 0x60, - 0x41, 0x30, 0x36, 0x32, 0x0A, 0x00, 0x0A, 0x60, + 0x41, 0x30, 0x34, 0x33, 0x0A, 0x00, 0x0A, 0x60, 0x0A, 0xCD, 0x60, 0x14, 0x4F, 0x04, 0x41, 0x30, - 0x38, 0x38, 0x02, 0x7D, 0x79, 0x68, 0x0A, 0x03, - 0x00, 0x0A, 0x01, 0x60, 0x41, 0x30, 0x38, 0x37, + 0x38, 0x33, 0x02, 0x7D, 0x79, 0x68, 0x0A, 0x03, + 0x00, 0x0A, 0x01, 0x60, 0x41, 0x30, 0x38, 0x32, 0x0A, 0x03, 0x60, 0x0A, 0x01, 0xA0, 0x15, 0x90, 0x69, 0x0A, 0x01, 0xA2, 0x0F, 0x92, 0x93, 0x7B, - 0x41, 0x30, 0x38, 0x36, 0x0A, 0x03, 0x0A, 0x02, + 0x41, 0x30, 0x38, 0x31, 0x0A, 0x03, 0x0A, 0x02, 0x00, 0x0A, 0x02, 0xA0, 0x15, 0x90, 0x69, 0x0A, 0x02, 0xA2, 0x0F, 0x92, 0x93, 0x7B, 0x41, 0x30, - 0x38, 0x36, 0x0A, 0x03, 0x0A, 0x04, 0x00, 0x0A, - 0x04, 0x41, 0x30, 0x38, 0x37, 0x0A, 0x03, 0x0A, - 0x00, 0x0A, 0x00, 0x14, 0x18, 0x41, 0x30, 0x30, - 0x34, 0x02, 0x41, 0x30, 0x38, 0x37, 0x0A, 0x0B, - 0x68, 0x0A, 0x00, 0x41, 0x30, 0x38, 0x37, 0x0A, + 0x38, 0x31, 0x0A, 0x03, 0x0A, 0x04, 0x00, 0x0A, + 0x04, 0x41, 0x30, 0x38, 0x32, 0x0A, 0x03, 0x0A, + 0x00, 0x0A, 0x01, 0x14, 0x18, 0x41, 0x30, 0x30, + 0x34, 0x02, 0x41, 0x30, 0x38, 0x32, 0x0A, 0x0B, + 0x68, 0x0A, 0x00, 0x41, 0x30, 0x38, 0x32, 0x0A, 0x05, 0x69, 0x0A, 0x01, 0x14, 0x19, 0x41, 0x30, - 0x30, 0x33, 0x01, 0x41, 0x30, 0x38, 0x37, 0x0A, + 0x30, 0x33, 0x01, 0x41, 0x30, 0x38, 0x32, 0x0A, 0x0B, 0x68, 0x0A, 0x00, 0x70, 0x41, 0x30, 0x38, - 0x36, 0x0A, 0x05, 0x60, 0xA4, 0x60, 0x14, 0x49, - 0x07, 0x41, 0x30, 0x38, 0x39, 0x01, 0x70, 0x7D, + 0x31, 0x0A, 0x05, 0x60, 0xA4, 0x60, 0x14, 0x49, + 0x07, 0x41, 0x30, 0x38, 0x34, 0x01, 0x70, 0x7D, 0x7B, 0x68, 0x0A, 0xFF, 0x00, 0x0C, 0x00, 0x50, 0x86, 0x01, 0x00, 0x60, 0x70, 0x7D, 0x7B, 0x68, 0x0C, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x0A, 0x04, @@ -221,11 +224,11 @@ UINT8 AlibSsdt[] = { 0x86, 0x61, 0x41, 0x30, 0x30, 0x34, 0x0B, 0x08, 0x86, 0x62, 0xA0, 0x12, 0x93, 0x7A, 0x68, 0x0A, 0x10, 0x00, 0x0B, 0x00, 0xFE, 0x41, 0x30, 0x38, - 0x38, 0x0A, 0x0D, 0x0A, 0x03, 0xA0, 0x12, 0x93, + 0x33, 0x0A, 0x0D, 0x0A, 0x03, 0xA0, 0x12, 0x93, 0x7A, 0x68, 0x0A, 0x10, 0x00, 0x0B, 0x30, 0xFE, - 0x41, 0x30, 0x38, 0x38, 0x0A, 0x0B, 0x0A, 0x03, + 0x41, 0x30, 0x38, 0x33, 0x0A, 0x0B, 0x0A, 0x03, 0xA4, 0x41, 0x30, 0x30, 0x33, 0x0B, 0x50, 0x86, - 0x14, 0x44, 0x06, 0x41, 0x30, 0x39, 0x30, 0x02, + 0x14, 0x44, 0x06, 0x41, 0x30, 0x38, 0x35, 0x02, 0x70, 0x7D, 0x7B, 0x68, 0x0A, 0xFF, 0x00, 0x0C, 0x00, 0x50, 0x86, 0x01, 0x00, 0x60, 0x70, 0x7D, 0x7B, 0x68, 0x0C, 0x00, 0xFF, 0xFF, 0xFF, 0x00, @@ -237,424 +240,535 @@ UINT8 AlibSsdt[] = { 0x34, 0x0B, 0x04, 0x86, 0x61, 0x41, 0x30, 0x30, 0x34, 0x0B, 0x08, 0x86, 0x62, 0x41, 0x30, 0x30, 0x34, 0x0B, 0x50, 0x86, 0x69, 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0x02, 0xA0, 0x1E, + 0x93, 0x69, 0x0A, 0x00, 0x7B, 0x7A, 0x41, 0x30, + 0x35, 0x33, 0x68, 0x0A, 0xA2, 0x0A, 0x04, 0x00, + 0x0A, 0x07, 0x60, 0x70, 0x83, 0x88, 0x41, 0x30, + 0x38, 0x30, 0x60, 0x00, 0x61, 0xA1, 0x42, 0x04, + 0x70, 0x41, 0x30, 0x37, 0x33, 0x68, 0x67, 0x70, + 0x83, 0x88, 0x67, 0x0A, 0x00, 0x00, 0x41, 0x30, + 0x36, 0x30, 0x70, 0x83, 0x88, 0x67, 0x0A, 0x01, + 0x00, 0x41, 0x30, 0x36, 0x31, 0xA0, 0x14, 0x94, + 0x41, 0x30, 0x36, 0x30, 0x41, 0x30, 0x36, 0x31, + 0x74, 0x41, 0x30, 0x36, 0x30, 0x41, 0x30, 0x36, + 0x31, 0x61, 0xA1, 0x0B, 0x74, 0x41, 0x30, 0x36, + 0x31, 0x41, 0x30, 0x36, 0x30, 0x61, 0x75, 0x61, + 0xA4, 0x61, 0x14, 0x4C, 0x09, 0x41, 0x30, 0x37, + 0x37, 0x0C, 0x70, 0x41, 0x30, 0x37, 0x33, 0x68, + 0x67, 0x70, 0x69, 0x41, 0x30, 0x36, 0x32, 0x70, + 0x6A, 0x41, 0x30, 0x36, 0x33, 0x70, 0x7D, 0x79, + 0x83, 0x88, 0x67, 0x72, 0x0A, 0x05, 0x0A, 0x01, + 0x00, 0x00, 0x0A, 0x08, 0x00, 0x83, 0x88, 0x67, + 0x0A, 0x05, 0x00, 0x00, 0x41, 0x30, 0x36, 0x34, + 0xA0, 0x1A, 0x94, 0x41, 0x30, 0x36, 0x32, 0x41, + 0x30, 0x36, 0x33, 0x74, 0x41, 0x30, 0x36, 0x32, + 0x41, 0x30, 0x36, 0x33, 0x61, 0x70, 0x41, 0x30, + 0x36, 0x33, 0x62, 0xA1, 0x11, 0x74, 0x41, 0x30, + 0x36, 0x33, 0x41, 0x30, 0x36, 0x32, 0x61, 0x70, + 0x41, 0x30, 0x36, 0x32, 0x62, 0x79, 0x74, 0x79, + 0x0A, 0x01, 0x72, 0x61, 0x0A, 0x01, 0x00, 0x00, + 0x0A, 0x01, 0x00, 0x62, 0x63, 0x70, 0x80, 0x63, + 0x00, 0x64, 0xA0, 0x09, 0x93, 0x6B, 0x0A, 0x01, + 0x70, 0x0A, 0x00, 0x63, 0x41, 0x30, 0x32, 0x38, + 0x0A, 0x00, 0x0A, 0xE0, 0x7D, 0x79, 0x41, 0x30, + 0x36, 0x34, 0x0A, 0x10, 0x00, 0x0B, 0x23, 0x80, + 0x00, 0x64, 0x63, 0x5B, 0x21, 0x0A, 0x0A, 0x14, + 0x4B, 0x05, 0x41, 0x30, 0x30, 0x32, 0x02, 0x70, + 0x41, 0x30, 0x30, 0x33, 0x0B, 0x90, 0x84, 0x60, + 0xA0, 0x4A, 0x04, 0x92, 0x93, 0x7B, 0x60, 0x0A, + 0xF0, 0x00, 0x0A, 0x00, 0xA0, 0x12, 0x93, 0x68, + 0x0A, 0x02, 0x7B, 0x60, 0x0C, 0xA0, 0xFF, 0xFF, + 0xFF, 0x60, 0x7D, 0x60, 0x0A, 0xA0, 0x60, 0xA1, + 0x23, 0xA0, 0x12, 0x93, 0x69, 0x0A, 0x00, 0x7B, + 0x60, 0x0C, 0x60, 0xFF, 0xFF, 0xFF, 0x60, 0x7D, + 0x60, 0x0A, 0x60, 0x60, 0xA1, 0x0E, 0x7B, 0x60, + 0x0C, 0x20, 0xFF, 0xFF, 0xFF, 0x60, 0x7D, 0x60, + 0x0A, 0x20, 0x60, 0x41, 0x30, 0x30, 0x34, 0x0B, + 0x90, 0x84, 0x60, 0x14, 0x06, 0x41, 0x30, 0x30, + 0x35, 0x01, 0x08, 0x41, 0x44, 0x30, 0x42, 0x0A, + 0x00, 0x14, 0x44, 0x04, 0x41, 0x30, 0x30, 0x36, + 0x01, 0xA0, 0x3C, 0x93, 0x41, 0x44, 0x30, 0x42, + 0x0A, 0x01, 0x70, 0x7D, 0x79, 0x0A, 0x18, 0x0A, + 0x03, 0x00, 0x0A, 0x04, 0x00, 0x61, 0x70, 0x41, + 0x30, 0x30, 0x37, 0x61, 0x0B, 0x5C, 0x01, 0x62, + 0xA0, 0x0A, 0x93, 0x68, 0x0A, 0x00, 0x7D, 0x62, + 0x0A, 0x01, 0x62, 0xA1, 0x09, 0x7B, 0x62, 0x0C, + 0xFC, 0xFF, 0xFF, 0xFF, 0x62, 0x41, 0x30, 0x30, + 0x38, 0x61, 0x0B, 0x5C, 0x01, 0x62 }; #endif diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexConfig.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexConfig.c index c64fc4bd72..5d9153bdce 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexConfig.c +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexConfig.c @@ -53,6 +53,7 @@ #include "amdlib.h" #include "Gnb.h" #include "GnbPcie.h" +#include "GnbPcieFamServices.h" #include GNB_MODULE_DEFINITIONS (GnbPcieConfig) #include "OntarioDefinitions.h" #include "OntarioComplexData.h" diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexServices.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexServices.c index 2e789aa4c9..0895c52d22 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexServices.c +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexServices.c @@ -55,6 +55,8 @@ #include GNB_MODULE_DEFINITIONS (GnbPcieInitLibV1) #include GNB_MODULE_DEFINITIONS (GnbPcieConfig) #include "OntarioDefinitions.h" +#include "GnbPcieFamServices.h" +#include "PcieFamilyServices.h" #include "GnbRegistersON.h" #include "NbSmuLib.h" #include "Filecode.h" diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePhyServices.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePhyServices.c index cb35a59133..fc7d4609c7 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePhyServices.c +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePhyServices.c @@ -73,6 +73,35 @@ *---------------------------------------------------------------------------------------- */ +AGESA_STATUS +PcieFmPhyLetPllPersonalityInit ( + IN PCIe_WRAPPER_CONFIG *Wrapper, + IN PCIe_PLATFORM_CONFIG *Pcie + ); + +VOID +PcieFmPhyChannelCharacteristic ( + IN PCIe_ENGINE_CONFIG *Engine, + IN PCIe_PLATFORM_CONFIG *Pcie + ); + +VOID +PcieFmAvertClockPickers ( + IN PCIe_WRAPPER_CONFIG *Wrapper, + IN PCIe_PLATFORM_CONFIG *Pcie + ); + +VOID +PcieFmPhyApplyGanging ( + IN PCIe_WRAPPER_CONFIG *Wrapper, + IN PCIe_PLATFORM_CONFIG *Pcie + ); + +VOID +PcieFmPifSetRxDetectPowerMode ( + IN PCIe_WRAPPER_CONFIG *Wrapper, + IN PCIe_PLATFORM_CONFIG *Pcie + ); /*----------------------------------------------------------------------------------------*/ /** diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePifServices.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePifServices.c index 31ef7c8980..fa1e62c5f3 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePifServices.c +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePifServices.c @@ -54,6 +54,7 @@ #include "GnbPcie.h" #include GNB_MODULE_DEFINITIONS (GnbCommonLib) #include GNB_MODULE_DEFINITIONS (GnbPcieInitLibV1) +#include "PcieFamilyServices.h" #include "GnbRegistersON.h" #include "Filecode.h" #define FILECODE PROC_GNB_PCIE_FAMILY_0X14_F14PCIEPIFSERVICES_FILECODE diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c index 88290b19cc..330a02e3d0 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c @@ -9,7 +9,7 @@ * @xrefitem bom "File Content Label" "Release Content" * @e project: AGESA * @e sub-project: GNB - * @e \$Revision: 39275 $ @e \$Date: 2010-10-09 08:22:05 +0800 (Sat, 09 Oct 2010) $ + * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $ * */ /* @@ -56,6 +56,7 @@ #include GNB_MODULE_DEFINITIONS (GnbCommonLib) #include GNB_MODULE_DEFINITIONS (GnbPcieInitLibV1) #include "PcieMiscLib.h" +#include "GnbPcieFamServices.h" #include "OntarioDefinitions.h" #include "GnbRegistersON.h" #include "NbSmuLib.h" @@ -97,12 +98,58 @@ PcieFmExecuteNativeGen1Reconfig ( IN PCIe_PLATFORM_CONFIG *Pcie ); +AGESA_STATUS +PcieOnGetGppConfigurationValue ( + IN UINT64 ConfigurationSignature, + OUT UINT8 *ConfigurationValue + ); + /*---------------------------------------------------------------------------------------- * T A B L E S *---------------------------------------------------------------------------------------- */ PCIE_HOST_REGISTER_ENTRY PcieInitTable [] = { { + PHY_SPACE (0, 0, D0F0xE4_PHY_6440_ADDRESS), + D0F0xE4_PHY_6440_RxInCalForce_MASK, + 0x1 << D0F0xE4_PHY_6440_RxInCalForce_OFFSET + }, + { + PHY_SPACE (0, 0, D0F0xE4_PHY_6480_ADDRESS), + D0F0xE4_PHY_6480_RxInCalForce_MASK, + 0x1 << D0F0xE4_PHY_6480_RxInCalForce_OFFSET + }, + { + PHY_SPACE (0, 0, D0F0xE4_PHY_6500_ADDRESS), + D0F0xE4_PHY_6500_RxInCalForce_MASK, + 0x1 << D0F0xE4_PHY_6500_RxInCalForce_OFFSET + }, + { + PHY_SPACE (0, 0, D0F0xE4_PHY_6600_ADDRESS), + D0F0xE4_PHY_6600_RxInCalForce_MASK, + 0x1 << D0F0xE4_PHY_6600_RxInCalForce_OFFSET + }, + { + PHY_SPACE (0, 0, D0F0xE4_PHY_6840_ADDRESS), + D0F0xE4_PHY_6840_RxInCalForce_MASK, + 0x1 << D0F0xE4_PHY_6840_RxInCalForce_OFFSET + }, + { + PHY_SPACE (0, 0, D0F0xE4_PHY_6880_ADDRESS), + D0F0xE4_PHY_6880_RxInCalForce_MASK, + 0x1 << D0F0xE4_PHY_6880_RxInCalForce_OFFSET + }, + { + PHY_SPACE (0, 0, D0F0xE4_PHY_6900_ADDRESS), + D0F0xE4_PHY_6900_RxInCalForce_MASK, + 0x1 << D0F0xE4_PHY_6900_RxInCalForce_OFFSET + }, + { + PHY_SPACE (0, 0, D0F0xE4_PHY_6A00_ADDRESS), + D0F0xE4_PHY_6A00_RxInCalForce_MASK, + 0x1 << D0F0xE4_PHY_6A00_RxInCalForce_OFFSET + }, + { WRAP_SPACE (0, D0F0xE4_WRAP_8016_ADDRESS), D0F0xE4_WRAP_8016_CalibAckLatency_MASK, 0 @@ -168,22 +215,22 @@ PcieFmConfigureEnginesLaneAllocation ( CONST UINT8 GppLaneConfigurationTable [][NUMBER_OF_GPP_PORTS * 2] = { //4 5 6 7 8 (SB) - 4, 7, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, 0, 3, - 4, 5, 6, 7, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, 0, 3, - 4, 5, UNUSED_LANE_ID, UNUSED_LANE_ID, 6, 7, UNUSED_LANE_ID, UNUSED_LANE_ID, 0, 3, - 4, 5, 6, 6, 7, 7, UNUSED_LANE_ID, UNUSED_LANE_ID, 0, 3, - 4, 5, UNUSED_LANE_ID, UNUSED_LANE_ID, 6, 6, 7, 7, 0, 3, - 4, 4, 5, 5, 6, 6, 7, 7, 0, 3 + {4, 7, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, 0, 3}, + {4, 5, 6, 7, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, UNUSED_LANE_ID, 0, 3}, + {4, 5, UNUSED_LANE_ID, UNUSED_LANE_ID, 6, 7, UNUSED_LANE_ID, UNUSED_LANE_ID, 0, 3}, + {4, 5, 6, 6, 7, 7, UNUSED_LANE_ID, UNUSED_LANE_ID, 0, 3}, + {4, 5, UNUSED_LANE_ID, UNUSED_LANE_ID, 6, 6, 7, 7, 0, 3}, + {4, 4, 5, 5, 6, 6, 7, 7, 0, 3} }; CONST UINT8 GppPortIdConfigurationTable [][NUMBER_OF_GPP_PORTS] = { //4 5 6 7 8 (SB) - 1, 2, 3, 4, 0, - 1, 2, 3, 4, 0, - 1, 3, 2, 4, 0, - 1, 2, 3, 4, 0, - 1, 4, 2, 3, 0, - 1, 2, 3, 4, 0 + {1, 2, 3, 4, 0}, + {1, 2, 3, 4, 0}, + {1, 3, 2, 4, 0}, + {1, 2, 3, 4, 0}, + {1, 4, 2, 3, 0}, + {1, 2, 3, 4, 0} }; /*----------------------------------------------------------------------------------------*/ @@ -227,7 +274,7 @@ PcieOnConfigureGppEnginesLaneAllocation ( CONST UINT8 DdiLaneConfigurationTable [][NUMBER_OF_DDIS * 2] = { - 0, 3, 4, 7, 8, 11 + {0, 3, 4, 7, 8, 11} }; /*----------------------------------------------------------------------------------------*/ @@ -391,7 +438,7 @@ PcieFmGetLinkSpeedCap ( LinkSpeedCapability = Engine->Type.Port.PortData.LinkSpeedCapability; } if ((Flags & PCIE_PORT_GEN_CAP_BOOT) != 0) { - if (Pcie->PsppPolicy == PsppBalanceLow) { + if (Pcie->PsppPolicy == PsppBalanceLow || Engine->Type.Port.PortData.MiscControls.LinkSafeMode == PcieGen1) { LinkSpeedCapability = PcieGen1; } } @@ -491,17 +538,17 @@ PcieFmDebugGetCoreConfigurationString ( { switch (ConfigurationValue) { case 4: - return "1x4, 4x1"; + return (CONST CHAR8*)"1x4, 4x1"; case 3: - return "1x4, 1x2, 2x1"; + return (CONST CHAR8*)"1x4, 1x2, 2x1"; case 2: - return "1x4, 2x2"; + return (CONST CHAR8*)"1x4, 2x2"; case 1: - return "1x4, 1x4"; + return (CONST CHAR8*)"1x4, 1x4"; default: break; } - return " !!! Something Wrong !!!"; + return (CONST CHAR8*)" !!! Something Wrong !!!"; } /*----------------------------------------------------------------------------------------*/ @@ -521,13 +568,13 @@ PcieFmDebugGetWrapperNameString ( { switch (Wrapper->WrapId) { case GPP_WRAP_ID: - return "GPPSB"; + return (CONST CHAR8*)"GPPSB"; case DDI_WRAP_ID: - return "Virtual DDI"; + return (CONST CHAR8*)"Virtual DDI"; default: break; } - return " !!! Something Wrong !!!"; + return (CONST CHAR8*)" !!! Something Wrong !!!"; } /*----------------------------------------------------------------------------------------*/ @@ -546,17 +593,17 @@ PcieFmDebugGetHostRegAddressSpaceString ( { switch (AddressFrame) { case 0x130: - return "GPP WRAP"; + return (CONST CHAR8*)"GPP WRAP"; case 0x110: - return "GPP PIF0"; + return (CONST CHAR8*)"GPP PIF0"; case 0x120: - return "GPP PHY0"; + return (CONST CHAR8*)"GPP PHY0"; case 0x101: - return "GPP CORE"; + return (CONST CHAR8*)"GPP CORE"; default: break; } - return " !!! Something Wrong !!!"; + return (CONST CHAR8*)" !!! Something Wrong !!!"; } diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/OntarioComplexData.h b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/OntarioComplexData.h index b9f9a04d0f..4aee593547 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/OntarioComplexData.h +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/OntarioComplexData.h @@ -52,7 +52,7 @@ F14_COMPLEX_CONFIG ComplexData = { { DESCRIPTOR_TERMINATE_LIST, {0}, - offsetof (F14_COMPLEX_CONFIG, GppWrapper), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), NULL }, //Gpp Wrapper @@ -72,9 +72,9 @@ F14_COMPLEX_CONFIG ComplexData = { 1, //TxclkGatingPllPowerDown 1 //PllOffInL1 }, - offsetof (F14_COMPLEX_CONFIG, Port4), - offsetof (F14_COMPLEX_CONFIG, Silicon), - offsetof (F14_COMPLEX_CONFIG, FmGppWrapper) + (VOID *)(offsetof (F14_COMPLEX_CONFIG, Port4)), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, Silicon)), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, FmGppWrapper)) }, //Virtual DDI Wrapper { @@ -93,14 +93,14 @@ F14_COMPLEX_CONFIG ComplexData = { 1, //TxclkGatingPllPowerDown 0 //PllOffInL1 }, - offsetof (F14_COMPLEX_CONFIG, Dpa), - offsetof (F14_COMPLEX_CONFIG, Silicon), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, Dpa)), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, Silicon)), NULL }, //Port 4 { DESCRIPTOR_PCIE_ENGINE, - offsetof (F14_COMPLEX_CONFIG, GppWrapper), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), { PciePortEngine, 4, 4}, 0, //Initialization Status 0xFF, //Scratch @@ -113,7 +113,7 @@ F14_COMPLEX_CONFIG ComplexData = { 0, GPP_CORE_ID, 1, - 0, + {0}, FALSE, LinkStateResetExit }, @@ -122,7 +122,7 @@ F14_COMPLEX_CONFIG ComplexData = { //Port 5 { DESCRIPTOR_PCIE_ENGINE, - offsetof (F14_COMPLEX_CONFIG, GppWrapper), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), { PciePortEngine, 5, 5}, 0, //Initialization Status 0xFF, //Scratch @@ -135,7 +135,7 @@ F14_COMPLEX_CONFIG ComplexData = { 0, GPP_CORE_ID, 2, - 0, + {0}, FALSE, LinkStateResetExit }, @@ -144,7 +144,7 @@ F14_COMPLEX_CONFIG ComplexData = { //Port 6 { DESCRIPTOR_PCIE_ENGINE, - offsetof (F14_COMPLEX_CONFIG, GppWrapper), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), { PciePortEngine, 6, 6 }, 0, //Initialization Status 0xFF, //Scratch @@ -157,7 +157,7 @@ F14_COMPLEX_CONFIG ComplexData = { 0, GPP_CORE_ID, 3, - 0, + {0}, FALSE, LinkStateResetExit }, @@ -166,7 +166,7 @@ F14_COMPLEX_CONFIG ComplexData = { //Port 7 { DESCRIPTOR_PCIE_ENGINE, - offsetof (F14_COMPLEX_CONFIG, GppWrapper), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), { PciePortEngine, 7, 7 }, 0, //Initialization Status 0xFF, //Scratch @@ -179,7 +179,7 @@ F14_COMPLEX_CONFIG ComplexData = { 0, GPP_CORE_ID, 4, - 0, + {0}, FALSE, LinkStateResetExit }, @@ -188,7 +188,7 @@ F14_COMPLEX_CONFIG ComplexData = { //Port 8 { DESCRIPTOR_PCIE_ENGINE | DESCRIPTOR_TERMINATE_LIST, - offsetof (F14_COMPLEX_CONFIG, GppWrapper), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), { PciePortEngine, 0, 3 }, 0, //Initialization Status 0xFF, //Scratch @@ -201,7 +201,7 @@ F14_COMPLEX_CONFIG ComplexData = { 0, GPP_CORE_ID, 0, - MAKE_SBDFO (0, 0, 8, 0, 0), + {MAKE_SBDFO (0, 0, 8, 0, 0)}, TRUE, LinkStateTrainingSuccess }, @@ -210,7 +210,7 @@ F14_COMPLEX_CONFIG ComplexData = { //Virtual DpA { DESCRIPTOR_DDI_ENGINE | DESCRIPTOR_VIRTUAL, - offsetof (F14_COMPLEX_CONFIG, DdiWrapper), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, DdiWrapper)), {PcieDdiEngine}, 0, //Initialization Status 0xFF, //Scratch @@ -218,7 +218,7 @@ F14_COMPLEX_CONFIG ComplexData = { //Virtual DpB { DESCRIPTOR_DDI_ENGINE | DESCRIPTOR_VIRTUAL, - offsetof (F14_COMPLEX_CONFIG, DdiWrapper), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, DdiWrapper)), {PcieDdiEngine}, 0, //Initialization Status 0xFF, //Scratch @@ -226,7 +226,7 @@ F14_COMPLEX_CONFIG ComplexData = { //Virtual VGA { DESCRIPTOR_DDI_ENGINE | DESCRIPTOR_VIRTUAL | DESCRIPTOR_TERMINATE_LIST, - offsetof (F14_COMPLEX_CONFIG, DdiWrapper), + (VOID *)(offsetof (F14_COMPLEX_CONFIG, DdiWrapper)), {PcieDdiEngine}, 0, //Initialization Status 0xFF, //Scratch |