diff options
author | efdesign98 <efdesign98@gmail.com> | 2011-06-20 18:12:43 -0700 |
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committer | Marc Jones <marcj303@gmail.com> | 2011-06-22 01:35:45 +0200 |
commit | 621ca384a7a5efb2cc7597504dc17b741cd2df10 (patch) | |
tree | 01871adc6d39f48916b5625b3aa1a4b6d5ab9c92 /src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h | |
parent | 05a89ab922473f375820a3bd68691bb085c62448 (diff) |
Move existing AMD Ffamily14 code to f14 folder
This change moves the AMD Family14 cpu Agesa code to
the vendorcode/amd/agesa/f14 folder to complete the
transition to the family oriented folder structure.
Change-Id: I211e80ee04574cc713f38b4cc1b767dbb2bfaa59
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/52
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h')
-rw-r--r-- | src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h b/src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h new file mode 100644 index 0000000000..bb5a54904c --- /dev/null +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h @@ -0,0 +1,70 @@ +/* $NoKeywords:$ */ +/** + * @file + * + * NB power management features + * + * + * + * @xrefitem bom "File Content Label" "Release Content" + * @e project: AGESA + * @e sub-project: GNB + * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $ + * + */ +/* + ***************************************************************************** + * + * Copyright (c) 2011, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * *************************************************************************** + * + */ + +#ifndef _NBPOWERMGMT_H_ +#define _NBPOWERMGMT_H_ + + +AGESA_STATUS +NbInitPowerManagement ( + IN GNB_PLATFORM_CONFIG *Gnb + ); + +///Control structure for clock gating feature +typedef struct { + BOOLEAN Smu_Sclk_Gating; ///<Control Smu SClk gating 1 Enable 0 Disable + BOOLEAN Smu_Lclk_Gating; ///<Control Smu LClk gating 1 Enable 0 Disable + BOOLEAN Orb_Sclk_Gating; ///<Control ORB SClk gating 1 Enable 0 Disable + BOOLEAN Orb_Lclk_Gating; ///<Control ORB LClk gating 1 Enable 0 Disable + BOOLEAN Ioc_Sclk_Gating; ///<Control IOC SClk gating 1 Enable 0 Disable + BOOLEAN Ioc_Lclk_Gating; ///<Control IOC LClk gating 1 Enable 0 Disable + BOOLEAN Bif_Sclk_Gating; ///<Control BIF SClk gating 1 Enable 0 Disable + BOOLEAN Gmc_Sclk_Gating; ///<Control GMC SClk gating 1 Enable 0 Disable + BOOLEAN Dce_Sclk_Gating; ///<Control DCE SClk gating 1 Enable 0 Disable + BOOLEAN Dce_Dispclk_Gating; ///<Control DCE dispaly gating 1 Enable 0 Disable +} NB_CLK_GATING_CTRL; + +#endif |