diff options
author | Peter Lemenkov <lemenkov@gmail.com> | 2018-12-07 11:23:21 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-17 14:52:33 +0000 |
commit | 7bbe3bb9f0caf518af89bc18b99cd9ac32ceff3f (patch) | |
tree | 4be81861c4f9187ef5b4ce0cc1cfd7daeea12dcd /src/vendorcode/amd/agesa/f14/Proc/GNB/Modules | |
parent | d5292bf9a5a1e47a3cbb6393f23c6f021232be02 (diff) |
vendorcode/{amd,cavium,intel}: Remove trailing whitespace
find src -type f "!" -regex ".*\.\(vbt\|bin\)" -exec sed -i -e "s,\s\+$,,g" {} \;
Change-Id: Ic70cf8524dcd0a0f5700f91b704b3c545dd8a01a
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30959
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/GNB/Modules')
5 files changed, 32 insertions, 32 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibConfig.esl b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibConfig.esl index 5150ee1d22..9140d6fb6b 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibConfig.esl +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibConfig.esl @@ -16,7 +16,7 @@ * * Copyright (c) 2011, Advanced Micro Devices, Inc. * All rights reserved. - * + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright @@ -24,10 +24,10 @@ * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. - * + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -38,7 +38,7 @@ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * + * * *************************************************************************** * */ diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl index ab67b9e02e..463093c6b1 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl @@ -16,7 +16,7 @@ * * Copyright (c) 2011, Advanced Micro Devices, Inc. * All rights reserved. - * + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright @@ -24,10 +24,10 @@ * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. - * + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -38,7 +38,7 @@ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * + * * *************************************************************************** * */ @@ -67,7 +67,7 @@ * PCIe port info * */ - + Name ( AD07, Package () { @@ -100,19 +100,19 @@ Method (ALIB, 2, NotSerialized) { If (Lequal (Arg0, 0x1)) { return (procPsppReportAcDsState (Arg1)) - } + } If (LEqual (Arg0, 0x2)) { return (procPsppPerformanceRequest (Arg1)) - } + } If (LEqual (Arg0, 0x3)) { return (procPsppControl (Arg1)) - } + } If (LEqual (Arg0, 0x4)) { return (procPcieSetBusWidth (Arg1)) - } + } If (LEqual (Arg0, 0x5)) { return (procAlibInit ()) - } + } If (LEqual (Arg0, 0x6)) { return (procPciePortHotplug (Arg1)) } @@ -180,7 +180,7 @@ procPciDwordWrite (Arg0, Arg1, Local0) } - Mutex(varPciePortAccessMutex, 0) + Mutex(varPciePortAccessMutex, 0) /*----------------------------------------------------------------------------------------*/ /** * Read PCIe port indirect register @@ -194,7 +194,7 @@ Store (ShiftLeft (Add( Arg0, 2), 3), Local0) procPciDwordWrite (Local0, 0xe0, Arg1) Store (procPciDwordRead (Local0, 0xe4), Local0) - Release (varPciePortAccessMutex) + Release (varPciePortAccessMutex) return (Local0) } @@ -281,7 +281,7 @@ /*----------------------------------------------------------------------------------------*/ /** - * + * * * Arg0 - Port ID * Retval - buffer that represent port data set @@ -320,7 +320,7 @@ /*----------------------------------------------------------------------------------------*/ /** - * + * * * Arg0 - Aspm * Arg1 - 0: Read, 1: Write @@ -336,7 +336,7 @@ IndexField (PMRI, PMRD, ByteAcc, NoLock, Preserve) { Offset(0xE0), // IO Base address of A-Link Express/ A-Link Bridge register - ABAR, 32, + ABAR, 32, } OperationRegion (ACFG, SystemIO, ABAR, 0x8) Field (ACFG, DWordAcc, Nolock, Preserve) //AB_INDX/AB_DATA diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibHotplug.esl b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibHotplug.esl index 5fa1a9774e..c2eede930c 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibHotplug.esl +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibHotplug.esl @@ -24,8 +24,8 @@ * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. -* * Neither the name of Advanced Micro Devices, Inc. nor the names of -* its contributors may be used to endorse or promote products derived +* * Neither the name of Advanced Micro Devices, Inc. nor the names of +* its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND @@ -446,7 +446,7 @@ Name (varLinkWidthBuffer, Buffer () {0, 1, 2, 4, 8, 12, 16}) Store (Concatenate ("Lane Bitmap : ", ToHexString (varLaneBitmapOrMaskLocal3), varStringBuffer), Debug) if (Lequal (Arg3, 1)) { Store (0, varLaneBitmapOrMaskLocal3) - } + } procIndirectRegisterRMW (0x0, 0xE0, Or (ShiftLeft (varWrapperId, 16), 0x8023), varLaneBitmapAndMaskLocal4, varLaneBitmapOrMaskLocal3); Stall (10) Store ("PcieLaneEnableControl Exit", Debug) diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPspp.esl b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPspp.esl index 2bfabc9077..fe968a154d 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPspp.esl +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPspp.esl @@ -24,8 +24,8 @@ * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. -* * Neither the name of Advanced Micro Devices, Inc. nor the names of -* its contributors may be used to endorse or promote products derived +* * Neither the name of Advanced Micro Devices, Inc. nor the names of +* its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuLib.esl b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuLib.esl index 43b1d62de0..5acf1c7d0c 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuLib.esl +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuLib.esl @@ -16,7 +16,7 @@ * * Copyright (c) 2011, Advanced Micro Devices, Inc. * All rights reserved. - * + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright @@ -24,10 +24,10 @@ * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. - * + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -38,7 +38,7 @@ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * + * * *************************************************************************** * */ @@ -118,7 +118,7 @@ Or (ShiftLeft (Arg0, 3), 0x1, Local0) procNbSmuIndirectRegisterWrite (0x3, Local0, 1) - + if (LAnd (Arg1, 1)) { while (LNotEqual (AND(procNbSmuIndirectRegisterRead (0x3), 0x2), 0x2)) { Store ("--Wait Ack--", Debug) |