aboutsummaryrefslogtreecommitdiff
path: root/src/vendorcode/amd/agesa/f14/Proc/CPU
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2020-08-30 13:51:44 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-01 03:06:04 +0000
commit8e6d5f2937c169914e46b5ebc973e5df5e4290a7 (patch)
tree1550c8877877a7a9b197da65bcff76f878bee560 /src/vendorcode/amd/agesa/f14/Proc/CPU
parentb7a68d5b05259a07a84a546e6a7e40948ba705ac (diff)
{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent
Convert 0X -> 0x Signed-off-by: Subrata Banik <subrata.banik@intel.com> Change-Id: Iea3ca67908135d0e85083a05bad2ea176ca34095 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44926 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/CPU')
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/CPU/Table.h2
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/CPU/cpuRegisters.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Table.h b/src/vendorcode/amd/agesa/f14/Proc/CPU/Table.h
index 2d33021ba3..6c047a1f44 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Table.h
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Table.h
@@ -474,7 +474,7 @@ typedef struct {
} PACKAGE_TYPE_FEATURES;
// Initializer Values for Package Type
-#define PACKAGE_TYPE_ALL 0XFFFF ///< Package Type apply all packages
+#define PACKAGE_TYPE_ALL 0xFFFF ///< Package Type apply all packages
// Initializer Values for Ht Host Pci Config Registers
#define HT_HOST_FEAT_COHERENT BIT0
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/cpuRegisters.h b/src/vendorcode/amd/agesa/f14/Proc/CPU/cpuRegisters.h
index 7d43c1751b..c2ffcb6122 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/cpuRegisters.h
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/cpuRegisters.h
@@ -203,7 +203,7 @@ typedef struct {
#define MSR_CPUID_NAME_STRING0 0xC0010030 // First CPUID namestring register
#define MSR_CPUID_NAME_STRING1 0xC0010031
-#define MSR_CPUID_NAME_STRING2 0XC0010032
+#define MSR_CPUID_NAME_STRING2 0xC0010032
#define MSR_CPUID_NAME_STRING3 0xC0010033
#define MSR_CPUID_NAME_STRING4 0xC0010034
#define MSR_CPUID_NAME_STRING5 0xC0010035 // Last CPUID namestring register