diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2015-01-14 00:41:44 +1100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-04-16 02:03:53 +0200 |
| commit | 5de5522685c260e9643bad14faa22d417e3fc662 (patch) | |
| tree | 3619af315b5dd780c4ba0fbb692988159c66efe8 /src/vendorcode/amd/agesa/f12 | |
| parent | 91d94b090799b5be5eafb5a82e247d928e982698 (diff) | |
vendorcode/amd/agesa: Fix tautological compare
An unsigned enum expression is always strictly positive;
Comparison with '>= 0' is a tautology, hence remove it.
Change-Id: I910d672f8a27d278c2a2fe1e4f39fc61f2c5dbc5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: https://review.coreboot.org/8207
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/vendorcode/amd/agesa/f12')
5 files changed, 5 insertions, 5 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c index a7c833b124..b4335d646f 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c +++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c @@ -172,7 +172,7 @@ MemNCmnGetSetFieldC32 ( UINT32 Mask; Value = 0; - if ((FieldName < BFEndOfList) && (FieldName >= 0)) { + if (FieldName < BFEndOfList) { Address = NBPtr->NBRegTable[FieldName]; if (Address) { Lowbit = TSEFO_END (Address); diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c index 51cbac71c1..7d5b684ada 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c +++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c @@ -157,7 +157,7 @@ MemNCmnGetSetFieldDA ( UINT32 Mask; Value = 0; - if ((FieldName < BFEndOfList) && (FieldName >= 0)) { + if (FieldName < BFEndOfList) { Address = NBPtr->NBRegTable[FieldName]; if (Address) { Lowbit = TSEFO_END (Address); diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c index a651d0c6f0..b84006b7ef 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c +++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c @@ -158,7 +158,7 @@ MemNCmnGetSetFieldDr ( UINT32 Mask; Value = 0; - if ((FieldName < BFEndOfList) && (FieldName >= 0)) { + if (FieldName < BFEndOfList) { Address = NBPtr->NBRegTable[FieldName]; if (Address) { Lowbit = TSEFO_END (Address); diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c index 04b6912215..8f59d4d79f 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c +++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c @@ -173,7 +173,7 @@ MemNCmnGetSetFieldHy ( UINT32 Mask; Value = 0; - if ((FieldName < BFEndOfList) && (FieldName >= 0)) { + if (FieldName < BFEndOfList) { Address = NBPtr->NBRegTable[FieldName]; if (Address) { Lowbit = TSEFO_END (Address); diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c index 9c52705725..ff6e673502 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c +++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c @@ -159,7 +159,7 @@ MemNCmnGetSetFieldLN ( if (FieldName == BFDctAccessDone) { // Llano does not support DctAccessDone. Assume DctAccessDone=1 always. Value = 1; - } else if ((FieldName < BFEndOfList) && (FieldName >= 0)) { + } else if (FieldName < BFEndOfList) { Address = NBPtr->NBRegTable[FieldName]; if (Address) { Lowbit = TSEFO_END (Address); |