Add AMD Family 12 cpu Agesa code

This is the addition of the AMD Family 12 cpu code.

Change-Id: I3febc81e192b4e86bbd3e8d6e1da62a28598fa8c
Signed-off-by: Frank Vibrans<frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/40
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>

1 files changed, 132 insertions, 0 deletions

diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbLib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbLib.c
new file mode 100755
index 0000000000..898521ae96
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbLib.c
@@ -0,0 +1,132 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * SB services
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 39931 $   @e \$Date: 2010-10-16 18:19:16 -0700 (Sat, 16 Oct 2010) $
+ *
+ */
+/*
+*****************************************************************************
+*
+* Copyright (c) 2011, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+/*----------------------------------------------------------------------------------------
+ *                             M O D U L E S    U S E D
+ *----------------------------------------------------------------------------------------
+ */
+#include  "AGESA.h"
+#include  "Ids.h"
+#include  "amdlib.h"
+#include  "Gnb.h"
+#include  "GnbSbLib.h"
+#include  "GnbCommonLib.h"
+#include  "Filecode.h"
+#define FILECODE PROC_GNB_MODULES_GNBSBLIB_GNBSBLIB_FILECODE
+/*----------------------------------------------------------------------------------------
+ *                   D E F I N I T I O N S    A N D    M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *                  T Y P E D E F S     A N D     S T R U C T U  R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *           P R O T O T Y P E S     O F     L O C A L     F U  N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ *Get SB IOAPIC Base Address
+ *
+ *
+ * @param[in]  StdHeader       Standard configuration header
+ * @retval     APIC base address
+ */
+UINT32
+SbGetSbIoApicBaseAddress (
+  IN       AMD_CONFIG_PARAMS         *StdHeader
+  )
+{
+  UINT32 ApicBaseAddress;
+  GnbLibIndirectIoBlockRead (0xCD6, 0xCD7, AccessWidth8, 0x34, 4, &ApicBaseAddress, StdHeader);
+  return ApicBaseAddress & 0xfffffff8;
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ *Get SB MMIO Base Address
+ *
+ *
+ * @param[in]  StdHeader       Standard configuration header
+ * @retval     MMIO base address
+ */
+UINT32
+SbGetSbMmioBaseAddress (
+  IN       AMD_CONFIG_PARAMS         *StdHeader
+  )
+{
+  UINT32 MmioBaseAddress;
+  GnbLibIndirectIoBlockRead (0xCD6, 0xCD7, AccessWidth8, 0x24, 4, &MmioBaseAddress, StdHeader);
+  return MmioBaseAddress & 0xfffffffc;
+}
+
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Get Alink config address
+ *
+ * @param[in]  StdHeader       Standard configuration header
+ * @retval     Alink base address
+ */
+/*----------------------------------------------------------------------------------------*/
+
+UINT16
+SbGetAlinkIoAddress (
+  IN       AMD_CONFIG_PARAMS         *StdHeader
+  )
+{
+
+  UINT16 AlinkPortAddress;
+  GnbLibIndirectIoBlockRead (0xCD6, 0xCD7, AccessWidth8, 0xE0, 2, &AlinkPortAddress, StdHeader);
+  return  AlinkPortAddress;
+}