diff options
author | efdesign98 <efdesign98@gmail.com> | 2011-06-16 16:35:54 -0700 |
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committer | Marc Jones <marcj303@gmail.com> | 2011-06-21 22:37:51 +0200 |
commit | b0969d65e675f7c7a3004fc3f6fc154f22e73d44 (patch) | |
tree | 7e11f186e900ce6fc77603515b85c2a4154c6849 /src/vendorcode/amd/agesa/f12/Makefile.inc | |
parent | d1cb0eecd130cb4259ce9fedb32ebcd9ada0d4b7 (diff) |
Add AMD Family 12 cpu Agesa code
This is the addition of the AMD Family 12 cpu code.
Change-Id: I3febc81e192b4e86bbd3e8d6e1da62a28598fa8c
Signed-off-by: Frank Vibrans<frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/40
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f12/Makefile.inc')
-rwxr-xr-x | src/vendorcode/amd/agesa/f12/Makefile.inc | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc new file mode 100755 index 0000000000..e1bafbe047 --- /dev/null +++ b/src/vendorcode/amd/agesa/f12/Makefile.inc @@ -0,0 +1,90 @@ +#***************************************************************************** +# +# Copyright (c) 2011, Advanced Micro Devices, Inc. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# * Neither the name of Advanced Micro Devices, Inc. nor the names of +# its contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#***************************************************************************** + +# AGESA V5 Files +AGESA_ROOT = src/vendorcode/amd/agesa/f12 + +AGESA_INC = -Isrc/mainboard/$(MAINBOARDDIR) +AGESA_INC += -I$(AGESA_ROOT) +AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU +AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Family +AGESA_INC += -I$(AGESA_ROOT)/Include +AGESA_INC += -I$(AGESA_ROOT)/Proc/IDS +AGESA_INC += -I$(AGESA_ROOT)/Lib +AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Feature +AGESA_INC += -I$(AGESA_ROOT)/Proc/Common +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem +AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/CPU +AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Family/0x12 +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Nb +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Common +AGESA_INC += -I$(AGESA_ROOT)/Proc/IDS/Family/0x12 +AGESA_INC += -I$(AGESA_ROOT)/Proc/IDS/Internal/Family/0x12 +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbCommonLib +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Gfx +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Gfx/Family +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbGfxConfig +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbGfxInitLibV1 +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbSbLib +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieConfig +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbNbInitLibV1 +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Nb/Family/LN +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbCableSafe +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV1 +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieAlibV1 +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieTrainingV1 +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Nb/Family +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Nb/Feature +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/PCIe/Family +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/PCIe +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/PCIe/Family/LN +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/PCIe/Feature +AGESA_INC += -I$(AGESA_ROOT)/Proc/HT +AGESA_INC += -I$(AGESA_ROOT)/Proc/HT/Fam12 +AGESA_INC += -I$(AGESA_ROOT)/Proc/IDS/Control +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Feat/CHINTLV +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Feat/CSINTLV +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Feat/ECC +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Feat/IDENDIMM +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Feat/INTLVRN +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Feat/LVDDR3 +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Feat/ODTHERMAL +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Main +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/NB/LN +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Tech +AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Tech/DDR3 + +AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing + +export AGESA_ROOT := $(AGESA_ROOT) +export AGESA_INC := $(AGESA_INC) +export AGESA_CFLAGS := $(AGESA_CFLAGS) +CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +#######################################################################
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