diff options
| author | Idwer Vollering <vidwer@gmail.com> | 2013-12-06 22:02:47 +0000 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2013-12-07 00:39:09 +0100 |
| commit | 8c0cb8ae3b3945a1f61a8eab3b9f41af9a0bb10b (patch) | |
| tree | ffcf90959d0dda0e5179d4e76c2f8a9845e8f4b4 /src/vendorcode/amd/agesa/f10/Proc | |
| parent | 6e6d719d827403af1504584b1b4281f8dbdbf2b4 (diff) | |
Correct file permissions.
Some files have incorrect/odd permissions,
correct them: remove unnecessary +x flags.
Change-Id: I784e6e599dfee88239f85bb58323aae9e40fb21c
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/4490
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f10/Proc')
| -rw-r--r--[-rwxr-xr-x] | src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD32.asm | 0 | ||||
| -rw-r--r--[-rwxr-xr-x] | src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD64.asm | 0 | ||||
| -rw-r--r--[-rwxr-xr-x] | src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.asm | 0 | ||||
| -rw-r--r--[-rwxr-xr-x] | src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib32.asm | 0 | ||||
| -rw-r--r--[-rwxr-xr-x] | src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib64.asm | 0 | ||||
| -rw-r--r--[-rwxr-xr-x] | src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.asm | 0 | ||||
| -rw-r--r--[-rwxr-xr-x] | src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.asm | 0 |
7 files changed, 0 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD32.asm b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD32.asm index ddd937ab66..ddd937ab66 100755..100644 --- a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD32.asm +++ b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD32.asm diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD64.asm b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD64.asm index 2804d29153..2804d29153 100755..100644 --- a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD64.asm +++ b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD64.asm diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.asm b/src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.asm index 0b796c8510..0b796c8510 100755..100644 --- a/src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.asm +++ b/src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.asm diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib32.asm b/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib32.asm index 6cd8a28a96..6cd8a28a96 100755..100644 --- a/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib32.asm +++ b/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib32.asm diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib64.asm b/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib64.asm index cec2bd8a32..cec2bd8a32 100755..100644 --- a/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib64.asm +++ b/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib64.asm diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.asm b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.asm index fe4c86b604..fe4c86b604 100755..100644 --- a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.asm +++ b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.asm diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.asm b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.asm index 725bd94261..725bd94261 100755..100644 --- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.asm +++ b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.asm |