AGESA f10 vendorcode: Remove refcode sources

We never had a board in the tree that implements this.

Change-Id: Idce32a20c24e31eb52f8509d4a7cccfc24cf17cf
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21180
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

41 files changed, 0 insertions, 9665 deletions

diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.c
deleted file mode 100644
index 016b75722a..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/**
- * @file
- *
- * AMD CPU Recovery API, and related functions.
- *
- * Contains code that implements the CPU Recovery functionality
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Recovery/CPU
- * @e \$Revision: 44323 $   @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- **/
-
-/*----------------------------------------------------------------------------------------
- *                             M O D U L E S    U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "cpuRecovery.h"
-#include "Table.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_CPU_CPURECOVERY_FILECODE
-/*----------------------------------------------------------------------------------------
- *                   D E F I N I T I O N S    A N D    M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- *                  T Y P E D E F S     A N D     S T R U C T U  R E S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- *           P R O T O T Y P E S     O F     L O C A L     F U  N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- *                          E X P O R T E D    F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Performs CPU related initialization at the recovery entry point
- *
- * This function processes the MSR and PCI register tables.
- *
- * @param[in]  CpuRecoveryParams     Required input parameters for recovery CPU
- *                                   initialization.
- *
- * @retval     AGESA_SUCCESS         Always succeeds.
- *
- */
-AGESA_STATUS
-AmdCpuRecovery (
-  IN       AMD_CPU_RECOVERY_PARAMS *CpuRecoveryParams
-  )
-{
-  SetRegistersFromTables (&CpuRecoveryParams->PlatformConfig, &CpuRecoveryParams->StdHeader);
-  return (AGESA_SUCCESS);
-}
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.h
deleted file mode 100644
index 788eb1a0a6..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/**
- * @file
- *
- * AMD CPU Recovery API, and related function prototypes.
- *
- * Contains code that implements the CPU Recovery functionality
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Recovery/CPU
- * @e \$Revision: 44323 $   @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-#ifndef _CPU_RECOVERY_H_
-#define _CPU_RECOVERY_H_
-
-/*----------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *----------------------------------------------------------------------------------------
- */
-
-//                          These are   P U B L I C   functions
-AGESA_STATUS
-AmdCpuRecovery (
-  IN       AMD_CPU_RECOVERY_PARAMS *CpuRecoveryParams
-  );
-
-#endif // _CPU_RECOVERY_H_
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitRecovery.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitRecovery.c
deleted file mode 100644
index 469c9745f6..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitRecovery.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/**
- * @file
- *
- * Init the Socket and Node maps for Recovery mode.
- *
- * Create the Socket and Node maps just like normal boot,
- * except that they only indicate the BSC is present.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  HyperTransport
- * @e \$Revision: 7506 $   @e \$Date: 2008-08-20 17:44:22 -0500 (Wed, 20 Aug 2008) $
- *
- */
-/*
-*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "Topology.h"
-#include "heapManager.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_HT_HTINITRECOVERY_FILECODE
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Get new Socket and Node Maps.
- *
- * Put the Socket Die Table and the Node Table in heap with known handles.
- *
- * @param[out]    SocketDieToNodeMap   The Socket, Module to Node info map
- * @param[out]    NodeToSocketDieMap   The Node to Socket, Module map.
- * @param[in]     StdHeader            Header for library and services.
- */
-VOID
-STATIC
-NewNodeAndSocketTablesRecovery (
-     OUT   SOCKET_DIE_TO_NODE_MAP *SocketDieToNodeMap,
-     OUT   NODE_TO_SOCKET_DIE_MAP *NodeToSocketDieMap,
-  IN       AMD_CONFIG_PARAMS      *StdHeader
-  )
-{
-  UINT8 i;
-  UINT8 j;
-  ALLOCATE_HEAP_PARAMS AllocHeapParams;
-
-  // Allocate heap for the table
-  AllocHeapParams.RequestedBufferSize = (((MAX_SOCKETS) * (MAX_DIES)) * sizeof (SOCKET_DIE_TO_NODE_ITEM));
-  AllocHeapParams.BufferHandle = SOCKET_DIE_MAP_HANDLE;
-  AllocHeapParams.Persist = HEAP_SYSTEM_MEM;
-  if (HeapAllocateBuffer (&AllocHeapParams, StdHeader) == AGESA_SUCCESS) {
-    // HeapAllocateBuffer must set BufferPtr to valid or NULL.
-    *SocketDieToNodeMap = (SOCKET_DIE_TO_NODE_MAP)AllocHeapParams.BufferPtr;
-    ASSERT (SocketDieToNodeMap != NULL);
-    // Initialize shared data structures
-    for (i = 0; i < MAX_SOCKETS; i++) {
-      for (j = 0; j < MAX_DIES; j++) {
-        (**SocketDieToNodeMap)[i][j].Node = HT_LIST_TERMINAL;
-        (**SocketDieToNodeMap)[i][j].LowCore = HT_LIST_TERMINAL;
-        (**SocketDieToNodeMap)[i][j].HighCore = HT_LIST_TERMINAL;
-      }
-    }
-  }
-  // Allocate heap for the table
-  AllocHeapParams.RequestedBufferSize = (MAX_NODES * sizeof (NODE_TO_SOCKET_DIE_ITEM));
-  AllocHeapParams.BufferHandle = NODE_ID_MAP_HANDLE;
-  AllocHeapParams.Persist = HEAP_SYSTEM_MEM;
-  if (HeapAllocateBuffer (&AllocHeapParams, StdHeader) == AGESA_SUCCESS) {
-    // HeapAllocateBuffer must set BufferPtr to valid or NULL.
-    *NodeToSocketDieMap = (NODE_TO_SOCKET_DIE_MAP)AllocHeapParams.BufferPtr;
-    ASSERT (NodeToSocketDieMap != NULL);
-    // Initialize shared data structures
-    for (i = 0; i < MAX_NODES; i++) {
-      (**NodeToSocketDieMap)[i].Socket = HT_LIST_TERMINAL;
-      (**NodeToSocketDieMap)[i].Die = HT_LIST_TERMINAL;
-    }
-  }
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Initialize the Node and Socket maps for an AP Core.
- *
- * In each core's local heap, create a Node to Socket map and a Socket/Module to Node map.
- * The mapping is filled in by reading the AP Mailboxes from PCI config on each node.
- *
- * @param[in]    StdHeader    global state, input data
- *
- * @retval       AGESA_SUCCESS  Always succeeds.
- */
-AGESA_STATUS
-AmdHtInitRecovery (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  AP_MAILBOXES NodeApMailBox;
-  ALLOCATE_HEAP_PARAMS AllocHeapParams;
-  SOCKET_DIE_TO_NODE_MAP SocketDieToNodeMap;
-  NODE_TO_SOCKET_DIE_MAP NodeToSocketDieMap;
-
-  NodeApMailBox.ApMailInfo.Info = 0;
-  NodeApMailBox.ApMailExtInfo.Info = 0;
-
-  // Allocate heap for caching the mailboxes
-  AllocHeapParams.RequestedBufferSize = sizeof (AP_MAILBOXES);
-  AllocHeapParams.BufferHandle = LOCAL_AP_MAIL_BOX_CACHE_HANDLE;
-  AllocHeapParams.Persist = HEAP_SYSTEM_MEM;
-  if (HeapAllocateBuffer (&AllocHeapParams, StdHeader) == AGESA_SUCCESS) {
-    *(AP_MAILBOXES *)AllocHeapParams.BufferPtr = NodeApMailBox;
-  }
-
-  NewNodeAndSocketTablesRecovery (&SocketDieToNodeMap, &NodeToSocketDieMap, StdHeader);
-  // HeapAllocateBuffer must set BufferPtr to valid or NULL, so the checks below are ok.
-
-  // There is no option to not have socket - node maps, if they aren't allocated that is a fatal bug.
-  ASSERT (SocketDieToNodeMap != NULL);
-  ASSERT (NodeToSocketDieMap != NULL);
-
-  (*SocketDieToNodeMap)[0][0].Node = 0;
-  (*SocketDieToNodeMap)[0][0].LowCore = 0;
-  (*SocketDieToNodeMap)[0][0].HighCore = 0;
-
-  // We lie about being Socket 0 and Module 0 always, it isn't necessarily true.
-  (*NodeToSocketDieMap)[0].Socket = (UINT8)0;
-  (*NodeToSocketDieMap)[0].Die = (UINT8)0;
-
-  return AGESA_SUCCESS;
-}
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitReset.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitReset.c
deleted file mode 100644
index 23623e8404..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitReset.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/**
- * @file
- *
- * Recovery HT, a Hypertransport init for Boot Blocks.  For normal
- * boots, run Recovery HT first in boot block, then run full HT init
- * in the system BIOS.  Recovery HT moves the devices on the chain with
- * the southbridge to their assigned device IDS, so that all their PCI
- * Config space is accessible.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Recovery HyperTransport
- * @e \$Revision: 44323 $   @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "AdvancedApi.h"
-#include "GeneralServices.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_HT_HTINITRESET_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-#define MAX_NODES 1
-#define MAX_LINKS 8
-
-extern CONST AMD_HT_RESET_INTERFACE HtOptionResetDefaults;
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/**
- * Our global state data structure.
- *
- * Keep track of inputs and outputs, and keep any working state.
- */
-typedef struct {
-  AMD_HT_RESET_INTERFACE      *HtBlock;       ///< The interface
-  AGESA_STATUS                Status;         ///< Remember the highest severity status event
-  VOID                        *ConfigHandle;  ///< Config Pointer, opaque handle for passing to lib
-} HTR_STATE_DATA;
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/***************************************************************************
- ***               FAMILY/NORTHBRIDGE SPECIFIC FUNCTIONS                 ***
- ***************************************************************************/
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Enable Routing Tables.
- *
- * Turns routing tables on for a node zero.
- *
- * @param[in] State Our State
- */
-
-VOID
-STATIC
-HtrEnableRoutingTables (
-  IN HTR_STATE_DATA *State
-  )
-{
-  PCI_ADDR Reg;
-  UINT32 Temp;
-  Temp = 0;
-  Reg.AddressValue = MAKE_SBDFO (0, 0, 24, 0, 0x6C);
-  LibAmdPciWriteBits (Reg, 0, 0, &Temp, State->ConfigHandle);
-}
-
-/***************************************************************************
- ***                       Non-coherent init code                        ***
- ***                             Algorithms                              ***
- ***************************************************************************/
-/*----------------------------------------------------------------------------------------*/
-/**
- * Process the SouthBridge Link.
- *
- * Process a non-coherent link, and setting the device ID for all devices found.
- *
- * @param[in] State Our State, Inputs
- */
-VOID
-STATIC
-HtrProcessLink (
-  IN HTR_STATE_DATA *State
-  )
-{
-  UINT32 CurrentBUID;
-  UINT32 Temp;
-  UINT32 UnitIDcnt;
-  PCI_ADDR CurrentPtr;
-  UINT8 Depth;
-  BUID_SWAP_LIST *SwapPtr;
-
-  // No PCI init to run, everything has to be on Bus zero.  This makes fewer
-  // northbridge dependencies.
-  //
-  // Assign BUIDs so that config space for all devices is visible.
-  //
-  if (State->HtBlock->ManualBuidSwapList != NULL) {
-    // Manual non-coherent BUID assignment
-    // Assign BUID's per manual override
-    //
-    SwapPtr = &(State->HtBlock->ManualBuidSwapList->SwapList);
-    Depth = 0;
-    while (SwapPtr->Swaps[Depth].FromId != 0xFF) {
-      CurrentPtr.AddressValue = MAKE_SBDFO (0, 0, SwapPtr->Swaps[Depth].FromId, 0, 0);
-
-      do {
-        LibAmdPciFindNextCap (&CurrentPtr, State->ConfigHandle);
-        ASSERT (CurrentPtr.AddressValue != ILLEGAL_SBDFO);
-        LibAmdPciRead (AccessWidth32, CurrentPtr, &Temp, State->ConfigHandle);
-      } while ((Temp & (UINT32)0xE00000FF) != (UINT32)0x00000008); // HyperTransport Slave Capability
-
-      CurrentBUID = SwapPtr->Swaps[Depth].ToId;
-      // Set the device's BUID
-      LibAmdPciWriteBits (CurrentPtr, 20, 16, &CurrentBUID, State->ConfigHandle);
-      Depth++;
-    }
-  } else {
-    // Automatic non-coherent device detection
-    Depth = 0;
-    CurrentBUID = 1;
-    for (;;) {
-      CurrentPtr.AddressValue = MAKE_SBDFO (0, 0, 0, 0, 0);
-
-      LibAmdPciRead (AccessWidth32, CurrentPtr, &Temp, State->ConfigHandle);
-      if (Temp == (UINT32)0xFFFFFFFF) {
-        // No device found at currentPtr
-        break;
-      }
-
-      // HyperTransport Slave Capability
-      do {
-        LibAmdPciFindNextCap (&CurrentPtr, State->ConfigHandle);
-        if (CurrentPtr.AddressValue == ILLEGAL_SBDFO) {
-          // There is a device at currentPtr, but it isn't an HT device.
-          return;
-        }
-        LibAmdPciRead (AccessWidth32, CurrentPtr, &Temp, State->ConfigHandle);
-      } while ((Temp & (UINT32)0xE00000FF) != (UINT32)0x00000008); // HyperTransport Slave Capability
-
-      // Get the device's Unit ID Count.
-      LibAmdPciReadBits (CurrentPtr, 25, 21, &UnitIDcnt, State->ConfigHandle);
-      if ((UnitIDcnt + CurrentBUID) > 24) {
-        // An error handler for the case where we run out of BUID's on a chain
-        State->Status = AGESA_ERROR;
-        ASSERT (FALSE);
-        return;
-      }
-      // Set the device's BUID
-      LibAmdPciWriteBits (CurrentPtr, 20, 16, &CurrentBUID, State->ConfigHandle);
-
-      CurrentPtr.Address.Device = CurrentBUID;
-      // Get the device's BUID
-      LibAmdPciReadBits (CurrentPtr, 20, 16, &Temp, State->ConfigHandle);
-      if (Temp != CurrentBUID) {
-        // An error handler for this critical error
-        State->Status = AGESA_ERROR;
-        ASSERT (FALSE);
-        return;
-      }
-
-      Depth++;
-      CurrentBUID += UnitIDcnt;
-    }
-    // Provide information on automatic device results
-    State->HtBlock->Depth = Depth;
-  }
-}
-
-/***************************************************************************
- ***                           HT Reset Initialize                    ***
- ***************************************************************************/
-
-/**
- * A constructor for the HyperTransport input structure.
- *
- * Sets inputs to valid, basic level, defaults.
- *
- * @param[in]     StdHeader             Config handle
- * @param[in,out] AmdHtResetInterface   HT Interface structure to initialize.
- *
- * @retval AGESA_SUCCESS      Constructors are not allowed to fail
-*/
-AGESA_STATUS
-AmdHtResetConstructor (
-  IN       AMD_CONFIG_PARAMS         *StdHeader,
-  IN       AMD_HT_RESET_INTERFACE    *AmdHtResetInterface
-  )
-{
-  AmdHtResetInterface->ManualBuidSwapList = HtOptionResetDefaults.ManualBuidSwapList;
-  return AGESA_SUCCESS;
-}
-
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Initialize HT for Reset, Boot Blocks.
- *
- * This is the top level external interface for Hypertransport Reset Initialization.
- * Create our initial internal state and initialize the non-coherent chain to the
- * southbridge.  This interface must be executed by both normal and recovery boot paths.
- *
- * @param[in]  StdHeader                 Interface structure
- * @param[in]  AmdHtResetInterface       our interface and inputs
- *
- * @retval AGESA_SUCCESS Successful init
- * @retval AGESA_ERROR   Device Error, BUID max exceed error.
- *
- */
-AGESA_STATUS
-AmdHtInitReset (
-  IN       AMD_CONFIG_PARAMS        *StdHeader,
-  IN       AMD_HT_RESET_INTERFACE   *AmdHtResetInterface
-  )
-{
-  HTR_STATE_DATA State;
-  AGESA_STATUS IgnoredStatus;
-
-  State.Status = AGESA_SUCCESS;
-  if (IsBsp (StdHeader, &IgnoredStatus)) {
-    State.ConfigHandle = (AMD_CONFIG_PARAMS *)StdHeader;
-    State.HtBlock = AmdHtResetInterface;
-    HtrEnableRoutingTables (&State);
-
-    HtrProcessLink (&State);
-  }
-  return State.Status;
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.c
deleted file mode 100644
index 8c6677dec0..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.c
+++ /dev/null
@@ -1,700 +0,0 @@
-/**
- * @file
- *
- * mrnc32.c
- *
- * Common Northbridge  functions for C32 Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 13435 $ @e \$Date: 2009-05-12 02:26:55 +0800 (Tue, 12 May 2009) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "mrport.h"
-#include "cpuFamRegisters.h"
-#include "cpuRegisters.h"
-#include "cpuFamilyTranslation.h"
-#include "mm.h"
-#include "mn.h"
-#include "mrnc32.h"
-#include "heapManager.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_C32_MRNC32_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-#define MAX_DCTS_PER_DIE 2
-#define SPLIT_CHANNEL   0x20000000
-#define CHANNEL_SELECT  0x10000000
-#define MAX_DELAYS    9   /* 8 data bytes + 1 ECC byte */
-#define MAX_DIMMS     4   /* 4 DIMMs per channel */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-VOID
-STATIC
-MemRecNInitNBRegTableC32 (
-  IN OUT   TSEFO *NBRegTable
-  );
-
-UINT32
-STATIC
-MemRecNCmnGetSetFieldC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       BIT_FIELD_NAME FieldName,
-  IN       UINT32 Field
-  );
-
-UINT32
-STATIC
-MemRecNcmnGetSetTrainDlyC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar,
-  IN       UINT16 Field
-  );
-
-BOOLEAN
-STATIC
-MemRecNIsIdSupportedC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       CPU_LOGICAL_ID *LogicalIdPtr
-  );
-
-VOID
-STATIC
-MemRecNSwitchNodeC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 NodeID
-  );
-
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function initializes the northbridge block
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in,out]   *MemPtr  - Pointer to the MEM_DATA_STRUCT
- *     @param[in]       NodeID   - Node ID for this NB block
- *
- *     @return          TRUE  - This node is a C32 and this NB block has been initialized
- *     @return          FALSE - This node is not a C32
- */
-
-BOOLEAN
-MemRecConstructNBBlockC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN OUT   MEM_DATA_STRUCT *MemPtr,
-  IN       UINT8 NodeID
-  )
-{
-  UINT8 Dct;
-  UINT8 Channel;
-  DIE_STRUCT *MCTPtr;
-  ALLOCATE_HEAP_PARAMS AllocHeapParams;
-
-  //
-  // Determine if this is the expected NB Type
-  //
-  GetLogicalIdOfSocket (MemPtr->DiesPerSystem[NodeID].SocketId, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid), &(MemPtr->StdHeader));
-  if (!MemRecNIsIdSupportedC32 (NBPtr, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid))) {
-    return FALSE;
-  }
-
-  //
-  // Allocate buffer for DCT_STRUCTs and CH_DEF_STRUCTs
-  //
-  MCTPtr = &MemPtr->DiesPerSystem[NodeID];
-  AllocHeapParams.RequestedBufferSize = MAX_DCTS_PER_NODE_C32 * (
-                                          sizeof (DCT_STRUCT) + (
-                                            MAX_CHANNELS_PER_DCT_C32 * (
-                                              sizeof (CH_DEF_STRUCT) + (
-                                                MAX_DIMMS * MAX_DELAYS * NUMBER_OF_DELAY_TABLES
-                                              )
-                                            )
-                                          )
-                                        );
-  AllocHeapParams.BufferHandle = GENERATE_MEM_HANDLE (ALLOC_DCT_STRUCT_HANDLE, NodeID, 0, 0);
-  AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
-  if (HeapAllocateBuffer (&AllocHeapParams, &MemPtr->StdHeader) != AGESA_SUCCESS) {
-    return FALSE;
-  }
-
-  MCTPtr->DctCount = MAX_DCTS_PER_NODE_C32;
-  MCTPtr->DctData = (DCT_STRUCT *) AllocHeapParams.BufferPtr;
-  MemPtr->DiesPerSystem[NodeID + 1].DctCount = MAX_DCTS_PER_NODE_C32;
-  MemPtr->DiesPerSystem[NodeID + 1].DctData = (DCT_STRUCT *) AllocHeapParams.BufferPtr;
-  AllocHeapParams.BufferPtr += MAX_DCTS_PER_NODE_C32 * sizeof (DCT_STRUCT);
-  for (Dct = 0; Dct < MAX_DCTS_PER_NODE_C32; Dct++) {
-    MCTPtr->DctData[Dct].Dct = Dct;
-    MCTPtr->DctData[Dct].ChannelCount = MAX_CHANNELS_PER_DCT_C32;
-    MCTPtr->DctData[Dct].ChData = (CH_DEF_STRUCT *) AllocHeapParams.BufferPtr;
-    MCTPtr->DctData[Dct].ChData[0].ChannelID = (MCTPtr->DieId * 2) + Dct;
-    AllocHeapParams.BufferPtr += MAX_CHANNELS_PER_DCT_C32 * sizeof (CH_DEF_STRUCT);
-    for (Channel = 0; Channel < MAX_CHANNELS_PER_DCT_C32; Channel++) {
-      MCTPtr->DctData[Dct].ChData[Channel].RcvEnDlys = (UINT16 *) AllocHeapParams.BufferPtr;
-      AllocHeapParams.BufferPtr += (MAX_DIMMS * MAX_DELAYS) * 2;
-      MCTPtr->DctData[Dct].ChData[Channel].WrDqsDlys = AllocHeapParams.BufferPtr;
-      MCTPtr->DctData[Dct].ChData[Channel].Dct = Dct;
-      AllocHeapParams.BufferPtr += (MAX_DIMMS * MAX_DELAYS);
-    }
-  }
-
-  //
-  //  Initialize NB block's variables
-  //
-  NBPtr->MemPtr = MemPtr;
-  NBPtr->RefPtr = MemPtr->ParameterListPtr;
-  NBPtr->MCTPtr = MCTPtr;
-  NBPtr->AllNodeMCTPtr = &MemPtr->DiesPerSystem[NodeID];
-  NBPtr->SPDPtr = &MemPtr->SpdDataStructure[MemPtr->DiesPerSystem[NodeID].SocketId * MAX_CHANNELS_PER_SOCKET * MAX_DIMMS_PER_CHANNEL];
-  NBPtr->AllNodeSPDPtr = &MemPtr->SpdDataStructure[MemPtr->DiesPerSystem[NodeID].SocketId * MAX_CHANNELS_PER_SOCKET * MAX_DIMMS_PER_CHANNEL];
-
-  NBPtr->DctCachePtr = NBPtr->DctCache;
-
-  MemRecNInitNBRegTableC32 (NBPtr->NBRegTable);
-  NBPtr->Dct = 0;
-  NBPtr->Channel = 0;
-  NBPtr->VarMtrrHiMsk = MemRecGetVarMtrrHiMsk (&(MemPtr->DiesPerSystem[NodeID].LogicalCpuid), &(MemPtr->StdHeader));
-
-  LibAmdMemFill (NBPtr->DctCache, 0, sizeof (NBPtr->DctCache), &NBPtr->MemPtr->StdHeader);
-  LibAmdMemFill (NBPtr->IsSupported, FALSE, sizeof (NBPtr->IsSupported), &NBPtr->MemPtr->StdHeader);
-
-  NBPtr->InitRecovery = MemRecNMemInitNb;
-
-  NBPtr->SwitchNodeRec = MemRecNSwitchNodeC32;
-  NBPtr->SwitchDCT = MemRecNSwitchDctC32;
-  NBPtr->SwitchChannel = MemRecNSwitchChannelC32;
-  NBPtr->SetMaxLatency = MemRecNSetMaxLatencyNb;
-  NBPtr->GetSysAddrRec = MemRecNGetMCTSysAddrNb;
-  NBPtr->SendMrsCmd = MemRecNSendMrsCmdNb;
-  NBPtr->sendZQCmd = MemRecNSendZQCmdNb;
-  NBPtr->SetDramOdtRec = MemRecNSetDramOdtNb;
-
-  NBPtr->GetBitField = MemRecNGetBitFieldNb;
-  NBPtr->SetBitField = MemRecNSetBitFieldNb;
-  NBPtr->GetTrainDly = MemRecNGetTrainDlyNb;
-  NBPtr->SetTrainDly = MemRecNSetTrainDlyNb;
-
-  NBPtr->MemRecNCmnGetSetFieldNb = MemRecNCmnGetSetFieldC32;
-  NBPtr->MemRecNcmnGetSetTrainDlyNb = MemRecNcmnGetSetTrainDlyC32;
-  NBPtr->MemRecNSwitchDctNb = MemRecNSwitchDctC32;
-  NBPtr->TrainingFlow = MemNRecTrainingFlowNb;
-  NBPtr->MemRecNFinalizeMctNb =  MemRecNFinalizeMctC32;
-  NBPtr->IsSupported[DramModeAfterDimmPres] = TRUE;
-  MemRecNSwitchDctC32 (NBPtr, 0);
-
-  return TRUE;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *
- *   This function sets the current die to work on.
- *   Should be called before accessing a certain die
- *   All data structures will be updated to point to the current node
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   NodeID - ID of the target die
- *
- */
-
-VOID
-STATIC
-MemRecNSwitchNodeC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 NodeID
-  )
-{
-  NBPtr->MCTPtr = &(NBPtr->AllNodeMCTPtr[NodeID]);
-  NBPtr->Node = NodeID;
-  NBPtr->MCTPtr->NodeId = NodeID;
-  MemRecNSwitchDctC32 (NBPtr, NBPtr->Dct);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets the current DCT to work on.
- *   Should be called before accessing a certain DCT
- *   All data structures will be updated to point to the current DCT
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   Dct - ID of the target DCT
- *
- */
-
-VOID
-MemRecNSwitchDctC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Dct
-  )
-{
-  NBPtr->Dct = Dct & 1;
-  NBPtr->SPDPtr = &(NBPtr->AllNodeSPDPtr[(NBPtr->MCTPtr->NodeId * MAX_DCTS_PER_DIE + Dct) * MAX_DIMMS_PER_CHANNEL]);
-  NBPtr->DCTPtr = &(NBPtr->MCTPtr->DctData[NBPtr->Dct]);
-
-  MemRecNSwitchChannelC32 (NBPtr, 0);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets the current channel to work on.
- *   Should be called before accessing a certain channel
- *   All data structures will be updated to point to the current channel
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   Channel - ID of the target channel
- *
- */
-
-VOID
-MemRecNSwitchChannelC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Channel
-  )
-{
-  NBPtr->Channel = 0;
-  NBPtr->ChannelPtr = &(NBPtr->DCTPtr->ChData[0]);
-}
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets or set DQS timing during training.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   TrnDly - type of delay to be set
- *     @param[in]   DrbnVar - encoding of Dimm-Rank-Byte-Nibble to be accessed
- *                  (use either DIMM_BYTE_ACCESS(dimm,byte) or CS_NBBL_ACCESS(cs,nibble) to use this encoding
- *     @param[in]   Field - Value to be programmed
- *     @param[in]   IsSet - Indicates if the function will set or get
- *
- *     @return      value read, if the function is used as a "get"
- */
-
-UINT32
-STATIC
-MemRecNcmnGetSetTrainDlyC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar,
-  IN       UINT16 Field
-  )
-{
-  UINT16 index;
-  UINT16 offset;
-  UINT32 value;
-  UINT32 address;
-  UINT8 DIMM;
-  UINT8 Rank;
-  UINT8 Byte;
-  UINT8 Nibble;
-
-  DIMM = DRBN_DIMM (DrbnVar);
-  Rank = DRBN_RANK (DrbnVar);
-  Byte = DRBN_BYTE (DrbnVar);
-  Nibble = DRBN_NBBL (DrbnVar);
-
-  switch (TrnDly) {
-  case AccessRcvEnDly:
-    index = 0x10;
-    break;
-  case AccessWrDqsDly:
-    index = 0x30;
-    break;
-  case AccessWrDatDly:
-    index = 0x01;
-    break;
-  case AccessRdDqsDly:
-    index = 0x05;
-    break;
-  case AccessPhRecDly:
-    index = 0x50;
-    break;
-  default:
-    index = 0;
-    IDS_ERROR_TRAP;
-  }
-
-  switch (TrnDly) {
-  case AccessRcvEnDly:
-  case AccessWrDqsDly:
-    index += (DIMM * 3);
-    if ((Byte & 0x04) != 0) {
-      // if byte 4,5,6,7
-      index += 0x10;
-    }
-    if ((Byte & 0x02) != 0) {
-      // if byte 2,3,6,7
-      index++;
-    }
-    if (Byte > 7) {
-      index += 2;
-    }
-    offset = 16 * (Byte % 2);
-    index |= (Rank << 8);
-    index |= (Nibble << 9);
-    break;
-
-  case AccessRdDqsDly:
-    Field &= ~ 0x0001;
-  case AccessWrDatDly:
-    index += (DIMM * 0x100);
-    if (Nibble != 0) {
-      if (Rank != 0) {
-        index += 0xA0;
-      } else {
-        index += 0x70;
-      }
-    } else if (Rank != 0) {
-      index += 0x60;
-    }
-    // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need
-    // to run AccessPhRecDly sequence.
-  case AccessPhRecDly:
-    index += (Byte / 4);
-    offset = 8 * (Byte % 4);
-    break;
-  default:
-    offset = 0;
-    IDS_ERROR_TRAP;
-  }
-
-  address = index;
-  MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, address);
-  while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-  value = MemRecNGetBitFieldNb (NBPtr, BFDctAddlDataReg);
-
-  if (IsSet != 0) {
-    if (TrnDly == AccessPhRecDly) {
-      value = NBPtr->DctCachePtr->PhRecReg[index & 0x03];
-    }
-
-    value = ((UINT32)Field << offset) | (value & (~((UINT32)0xFF << offset)));
-    MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, value);
-    address |= DCT_ACCESS_WRITE;
-    MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, address);
-    while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-
-    if (TrnDly == AccessPhRecDly) {
-      NBPtr->DctCachePtr->PhRecReg[index & 0x03] = value;
-    }
-  } else {
-    value = (value >> offset) & 0xFF;
-  }
-
-  return value;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets or sets a value to a bit field in a PCI register.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   FieldName - Name of Field to be set
- *     @param[in]   Field - Value to be programmed
- *     @param[in]   IsSet - Indicates if the function will set or get
- *
- *     @return      value read, if the function is used as a "get"
- */
-
-UINT32
-STATIC
-MemRecNCmnGetSetFieldC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       BIT_FIELD_NAME FieldName,
-  IN       UINT32 Field
-  )
-{
-  SBDFO Address;
-  PCI_ADDR PciAddr;
-  UINT8 Type;
-  UINT32 Value;
-  UINT32 Highbit;
-  UINT32 Lowbit;
-  UINT32 Mask;
-
-  Value = 0;
-  if (FieldName < BFEndOfList) {
-    Address = NBPtr->NBRegTable[FieldName];
-    if (Address != 0) {
-      Lowbit = TSEFO_END (Address);
-      Highbit = TSEFO_START (Address);
-      Type = TSEFO_TYPE (Address);
-
-      // If Fn2 and DCT1 selected, set Address to be 1xx
-      if (((Address & 0xF000) == 0x2000) && (NBPtr->Dct != 0)) {
-        Address |= 0x0100;
-      }
-      if ((Address >> 29) == ((DCT_PHY_ACCESS << 1) | 1)) {
-        // Special DCT Phy access
-        Address &= 0x0FFFFFFF;
-        Lowbit = 0;
-        Highbit = 16;
-      } else {
-        // Normal DCT Phy access
-        Address = TSEFO_OFFSET (Address);
-      }
-
-
-      if (Type == NB_ACCESS) {
-        // Address |= (((UINT32) (24 + 0)) << 15);
-        PciAddr.AddressValue = Address;
-        // Fix for MCM
-        PciAddr.Address.Device = NBPtr->MemPtr->DiesPerSystem[NBPtr->Node].PciAddr.Address.Device;
-        PciAddr.Address.Bus = NBPtr->MemPtr->DiesPerSystem[NBPtr->Node].PciAddr.Address.Bus;
-        PciAddr.Address.Segment = NBPtr->MemPtr->DiesPerSystem[NBPtr->Node].PciAddr.Address.Segment;
-        Address = PciAddr.AddressValue;
-        LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
-      } else if (Type == DCT_PHY_ACCESS) {
-        MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-        while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-
-        Value = MemRecNGetBitFieldNb (NBPtr, BFDctAddlDataReg);
-      } else {
-        IDS_ERROR_TRAP;
-      }
-
-      if (IsSet != 0) {
-        // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-        if ((Highbit - Lowbit) != 31) {
-          Mask = (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
-        } else {
-          Mask = (UINT32)0xFFFFFFFF;
-        }
-        Value &= ~(Mask << Lowbit);
-        Value |= (Field & Mask) << Lowbit;
-
-        if (Type == NB_ACCESS) {
-          PciAddr.AddressValue = Address;
-          LibAmdPciWrite (AccessWidth32, PciAddr , &Value, &NBPtr->MemPtr->StdHeader);
-        } else if (Type == DCT_PHY_ACCESS) {
-          MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
-          Address |= DCT_ACCESS_WRITE;
-
-          MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-          while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-        } else {
-          IDS_ERROR_TRAP;
-        }
-      } else {
-        Value = Value >> Lowbit;  // Shift
-        // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-        if ((Highbit - Lowbit) != 31) {
-          Value &= (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
-        }
-      }
-    }
-  } else {
-    IDS_ERROR_TRAP;   // Invalid bit field index
-  }
-  return Value;
-}
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function initializes bit field translation table
- *
-*     @param[in,out]   *NBRegTable   - Pointer to the NB Table *
- */
-
-VOID
-STATIC
-MemRecNInitNBRegTableC32 (
-  IN OUT   TSEFO *NBRegTable
-  )
-{
-  UINT16 i;
-  for (i = 0; i <= BFEndOfList; i++) {
-    NBRegTable[i] = 0;
-  }
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (0, 0x00), 31,  0, BFDevVendorIDReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (0, 0x60),  2,  0, BFNodeID);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x40), 31, 0, BFDramBaseReg0);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x44), 31, 0, BFDramLimitReg0);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x40), 31,  0, BFCSBaseAddr0Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x44), 31,  0, BFCSBaseAddr1Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x48), 31,  0, BFCSBaseAddr2Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x4C), 31,  0, BFCSBaseAddr3Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x50), 31,  0, BFCSBaseAddr4Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x54), 31,  0, BFCSBaseAddr5Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x58), 31,  0, BFCSBaseAddr6Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x5C), 31,  0, BFCSBaseAddr7Reg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x60), 31,  0, BFCSMask0Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x64), 31,  0, BFCSMask1Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x68), 31,  0, BFCSMask2Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x6C), 31,  0, BFCSMask3Reg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 31,  0, BFDramControlReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31,  0, BFDramInitRegReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x80), 31,  0, BFDramBankAddrReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 31,  0, BFDramMRSReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84),  9,  7, BFDramTerm);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 11, 10, BFDramTermDyn);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x88), 31,  0, BFDramTimingLoReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 31,  0, BFDramTimingHiReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 31,  0, BFDramConfigLoReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 31,  0, BFDramConfigHiReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x98), 31,  0, BFDctAddlOffsetReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x9C), 31,  0, BFDctAddlDataReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x98), 31, 31, BFDctAccessDone);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (3, 0xD4),  4,  0, BFNbFid);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 18, 18, BFDqsRcvEnTrain);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 31, 22, BFMaxLatency);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 15,  0, BFMrsAddress);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 18, 16, BFMrsBank);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 22, 20, BFMrsChipSel);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 26, 26, BFSendMrsCmd);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 27, 27, BFDeassertMemRstX);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 28, 28, BFAssertCke);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 29, 29, BFSendZQCmd);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 30, 30, BFSendCtrlWord);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31, 31, BFEnDramInit);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C),  7,  7, BFLevel);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 12, 12, BFMrsQoff);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 18, 18, BFDisAutoRefresh);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90),  0,  0, BFInitDram);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 16, 16, BFUnBuffDimm);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94),  8,  8, BFDdr3Mode);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94),  9,  9, BFLegacyBiosMode);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 11, 10, BFZqcsInterval);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 14, 14, BFDisDramInterface);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8),  5,  5, BFSubMemclkRegDly);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8),  6,  6, BFOdtSwizzle);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 15, 8, BFCtrlWordCS);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110),  8, 8, BFDramEnabled);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 31, 0, BFDctSelBaseAddrReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x114), 31, 0, BFDctSelBaseOffsetReg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 31,  0, BFMctCfgHiReg);
-
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 31,  0, BFODCControl);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x04, 31,  0, BFAddrTmgControl);
-
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  0,  0, BFWrtLvTrEn);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  1,  1, BFWrtLvTrMode);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  5,  4, BFTrDimmSel);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 11,  8, BFWrLvOdt);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 12, 12, BFWrLvOdtEn);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 30, 30, BFDisAutoComp);
-
-}
-
-/*-----------------------------------------------------------------------------*/
-/**
- *     MemRecNIsIdSupportedC32
- *      This function matches the CPU_LOGICAL_ID with certain criteria to
- *      determine if it is supported by this NBBlock.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]       *LogicalIdPtr - Pointer to the CPU_LOGICAL_ID
- *
- *     @return          TRUE -  This node is a C32.
- *     @return          FALSE - This node is not a C32.
- *
- */
-BOOLEAN
-STATIC
-MemRecNIsIdSupportedC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       CPU_LOGICAL_ID *LogicalIdPtr
-  )
-{
-  if ((LogicalIdPtr->Revision & AMD_F10_C32_ALL) != 0) {
-    return TRUE;
-  } else {
-    return FALSE;
-  }
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.h
deleted file mode 100644
index 4988547742..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/**
- * @file
- *
- * mnc32.h
- *
- * Northbridge C32 Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 13435 $ @e \$Date: 2009-05-12 02:26:55 +0800 (Tue, 12 May 2009) $
- *
- **/
-/*****************************************************************************
-  *
-  * Copyright (c) 2011, Advanced Micro Devices, Inc.
-  * All rights reserved.
-  *
-  * Redistribution and use in source and binary forms, with or without
-  * modification, are permitted provided that the following conditions are met:
-  *     * Redistributions of source code must retain the above copyright
-  *       notice, this list of conditions and the following disclaimer.
-  *     * Redistributions in binary form must reproduce the above copyright
-  *       notice, this list of conditions and the following disclaimer in the
-  *       documentation and/or other materials provided with the distribution.
-  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-  *       its contributors may be used to endorse or promote products derived
-  *       from this software without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  * ***************************************************************************
-  *
- */
-
-#ifndef _MRNC32_H_
-#define _MRNC32_H_
-
-/*----------------------------------------------------------------------------
- *   Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
- *
- *----------------------------------------------------------------------------
- */
-#define MAX_DCTS_PER_NODE_C32          2
-#define MAX_CHANNELS_PER_DCT_C32       1
-
-#define _4GB_RJ8    ((UINT32)4 << (30 - 8))
-#define MTRR_VALID  11
-
-/*-----------------------------------------------------------------------------
- *                         DEFINITIONS AND MACROS
- *
- *-----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                         TYPEDEFS, STRUCTURES, ENUMS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           FUNCTIONS PROTOTYPE
- *
- *----------------------------------------------------------------------------
- */
-
-BOOLEAN
-MemRecConstructNBBlockC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN OUT   MEM_DATA_STRUCT *MemPtr,
-  IN       UINT8 NodeID
-  );
-
-VOID
-MemRecNSwitchDctC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Dct
-  );
-
-VOID
-MemRecNSwitchChannelC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Channel
-  );
-
-VOID
-MemRecNFinalizeMctC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  );
-
-#endif  /* _MRNC32_H_ */
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnmctc32.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnmctc32.c
deleted file mode 100644
index 6116897fc1..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnmctc32.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/**
- * @file
- *
- * mrnmctc32.c
- *
- * Northbridge C32 MCT supporting functions Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 13435 $ @e \$Date: 2009-05-12 02:26:55 +0800 (Tue, 12 May 2009) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "mrport.h"
-#include "mm.h"
-#include "mn.h"
-#include "mrnc32.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_C32_MRNMCTC32_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets final values in BUCFG and BUCFG2
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemRecNFinalizeMctC32 (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  MEM_DATA_STRUCT *MemPtr;
-  S_UINT64 SMsr;
-
-  MemPtr = NBPtr->MemPtr;
-
-  // Recommended settings for F2x11C
-  MemRecNSetBitFieldNb (NBPtr, BFMctCfgHiReg, 0x2CE00F60);
-
-  LibAmdMsrRead (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  if (!NBPtr->ClToNbFlag) {
-    SMsr.lo &= ~((UINT32) 1 << 15);                // ClLinesToNbDis
-  }
-  LibAmdMsrWrite (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-
-  LibAmdMsrRead (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  SMsr.hi &= ~((UINT32) 1 << (48 - 32));               // WbEnhWsbDis
-  LibAmdMsrWrite (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-}
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnprotoc32.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnprotoc32.c
deleted file mode 100644
index fd2aa2ab9f..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnprotoc32.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/**
- * @file
- *
- * mrnprotoc32.c
- *
- * Northbridge support functions for Errata and early samples Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 10082 $ @e \$Date: 2008-12-17 20:21:26 +0800 (Wed, 17 Dec 2008) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-
-
-#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_C32_MRNPROTOC32_FILECODE
-/*
- *-----------------------------------------------------------------------------
- *                                EXPORTED FUNCTIONS
- *
- *-----------------------------------------------------------------------------
- */
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.c
deleted file mode 100644
index c25f85d1b2..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.c
+++ /dev/null
@@ -1,640 +0,0 @@
-/**
- * @file
- *
- * mrnda.c
- *
- * Common Northbridge  functions for Ridgeback Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 6783 $ @e \$Date: 2008-07-17 13:07:51 -0500 (Thu, 17 Jul 2008) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "cpuFamRegisters.h"
-#include "cpuRegisters.h"
-#include "cpuFamilyTranslation.h"
-#include "mrport.h"
-#include "mm.h"
-#include "mn.h"
-#include "mrnda.h"
-#include "heapManager.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_DA_MRNDA_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-#define SPLIT_CHANNEL   0x20000000
-#define CHANNEL_SELECT  0x10000000
-#define MAX_DELAYS    9   /* 8 data bytes + 1 ECC byte */
-#define MAX_DIMMS     4   /* 4 DIMMs per channel */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-VOID
-STATIC
-MemRecNInitNBRegTableDA (
-  IN OUT   TSEFO *NBRegTable
-  );
-
-UINT32
-STATIC
-MemRecNCmnGetSetFieldDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       BIT_FIELD_NAME FieldName,
-  IN       UINT32 Field
-  );
-
-UINT32
-STATIC
-MemRecNcmnGetSetTrainDlyDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar,
-  IN       UINT16 Field
-  );
-
-BOOLEAN
-STATIC
-MemRecNIsIdSupportedDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       CPU_LOGICAL_ID *LogicalIdPtr
-  );
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function initializes the northbridge block
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in,out]   *MemPtr  - Pointer to the MEM_DATA_STRUCT
- *     @param[in]       NodeID   - Node ID for this NB block
- *
- *     @return          TRUE  - This node is a RB and this NB block has been initialized
- *     @return          FALSE - This node is not a RB
- */
-
-BOOLEAN
-MemRecConstructNBBlockDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN OUT   MEM_DATA_STRUCT *MemPtr,
-  IN       UINT8 NodeID
-  )
-{
-  UINT8 Dct;
-  UINT8 Channel;
-  DIE_STRUCT *MCTPtr;
-  ALLOCATE_HEAP_PARAMS AllocHeapParams;
-
-  //
-  // Determine if this is the expected NB Type
-  //
-  GetLogicalIdOfSocket (MemPtr->DiesPerSystem[NodeID].SocketId, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid), &(MemPtr->StdHeader));
-  if (!MemRecNIsIdSupportedDA (NBPtr, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid))) {
-    return FALSE;
-  }
-
-  //
-  // Allocate buffer for DCT_STRUCTs and CH_DEF_STRUCTs
-  //
-  MCTPtr = &MemPtr->DiesPerSystem[NodeID];
-  AllocHeapParams.RequestedBufferSize = MAX_DCTS_PER_NODE_DA * (
-                                          sizeof (DCT_STRUCT) + (
-                                            MAX_CHANNELS_PER_DCT_DA * (
-                                              sizeof (CH_DEF_STRUCT) + (
-                                                MAX_DIMMS * MAX_DELAYS * NUMBER_OF_DELAY_TABLES
-                                              )
-                                            )
-                                          )
-                                        );
-  AllocHeapParams.BufferHandle = GENERATE_MEM_HANDLE (ALLOC_DCT_STRUCT_HANDLE, NodeID, 0, 0);
-  AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
-  if (HeapAllocateBuffer (&AllocHeapParams, &MemPtr->StdHeader) != AGESA_SUCCESS) {
-    return FALSE;
-  }
-
-  MCTPtr->DctCount = MAX_DCTS_PER_NODE_DA;
-  MCTPtr->DctData = (DCT_STRUCT *) AllocHeapParams.BufferPtr;
-  AllocHeapParams.BufferPtr += MAX_DCTS_PER_NODE_DA * sizeof (DCT_STRUCT);
-  for (Dct = 0; Dct < MAX_DCTS_PER_NODE_DA; Dct++) {
-    MCTPtr->DctData[Dct].Dct = Dct;
-    MCTPtr->DctData[Dct].ChannelCount = MAX_CHANNELS_PER_DCT_DA;
-    MCTPtr->DctData[Dct].ChData = (CH_DEF_STRUCT *) AllocHeapParams.BufferPtr;
-    MCTPtr->DctData[Dct].ChData[0].ChannelID = Dct;
-    AllocHeapParams.BufferPtr += MAX_CHANNELS_PER_DCT_DA * sizeof (CH_DEF_STRUCT);
-    for (Channel = 0; Channel < MAX_CHANNELS_PER_DCT_DA; Channel++) {
-      MCTPtr->DctData[Dct].ChData[Channel].RcvEnDlys = (UINT16 *) AllocHeapParams.BufferPtr;
-      AllocHeapParams.BufferPtr += (MAX_DIMMS * MAX_DELAYS) * 2;
-      MCTPtr->DctData[Dct].ChData[Channel].WrDqsDlys = AllocHeapParams.BufferPtr;
-      MCTPtr->DctData[Dct].ChData[Channel].Dct = Dct;
-      AllocHeapParams.BufferPtr += (MAX_DIMMS * MAX_DELAYS);
-    }
-  }
-
-  //
-  //  Initialize NB block's variables
-  //
-  NBPtr->MemPtr = MemPtr;
-  NBPtr->RefPtr = MemPtr->ParameterListPtr;
-  NBPtr->MCTPtr = MCTPtr;
-  NBPtr->SPDPtr = &MemPtr->SpdDataStructure[MemPtr->DiesPerSystem[NodeID].SocketId * MAX_CHANNELS_PER_SOCKET * MAX_DIMMS_PER_CHANNEL];
-  NBPtr->AllNodeSPDPtr = &MemPtr->SpdDataStructure[MemPtr->DiesPerSystem[NodeID].SocketId * MAX_CHANNELS_PER_SOCKET * MAX_DIMMS_PER_CHANNEL];
-
-  NBPtr->DctCachePtr = NBPtr->DctCache;
-
-  MemRecNInitNBRegTableDA (NBPtr->NBRegTable);
-  NBPtr->Dct = 0;
-  NBPtr->Channel = 0;
-  NBPtr->VarMtrrHiMsk = MemRecGetVarMtrrHiMsk (&(MemPtr->DiesPerSystem[NodeID].LogicalCpuid), &(MemPtr->StdHeader));
-
-  LibAmdMemFill (NBPtr->DctCache, 0, sizeof (NBPtr->DctCache), &NBPtr->MemPtr->StdHeader);
-  LibAmdMemFill (NBPtr->IsSupported, FALSE, sizeof (NBPtr->IsSupported), &NBPtr->MemPtr->StdHeader);
-
-  NBPtr->InitRecovery = MemRecNMemInitNb;
-
-  NBPtr->SwitchNodeRec = (VOID (*) (MEM_NB_BLOCK *, UINT8)) MemRecDefRet;
-  NBPtr->SwitchDCT = MemRecNSwitchDctDA;
-  NBPtr->SwitchChannel = MemRecNSwitchChannelDA;
-  NBPtr->SetMaxLatency = MemRecNSetMaxLatencyNb;
-  NBPtr->GetSysAddrRec = MemRecNGetMCTSysAddrNb;
-  NBPtr->SendMrsCmd = MemRecNSendMrsCmdNb;
-  NBPtr->sendZQCmd = MemRecNSendZQCmdNb;
-  NBPtr->SetDramOdtRec = MemRecNSetDramOdtNb;
-
-  NBPtr->GetBitField = MemRecNGetBitFieldNb;
-  NBPtr->SetBitField = MemRecNSetBitFieldNb;
-  NBPtr->GetTrainDly = MemRecNGetTrainDlyNb;
-  NBPtr->SetTrainDly = MemRecNSetTrainDlyNb;
-  NBPtr->MemRecNCmnGetSetFieldNb = MemRecNCmnGetSetFieldDA;
-  NBPtr->MemRecNcmnGetSetTrainDlyNb = MemRecNcmnGetSetTrainDlyDA;
-  NBPtr->MemRecNSwitchDctNb = MemRecNSwitchDctDA;
-  NBPtr->TrainingFlow = MemNRecTrainingFlowNb;
-  NBPtr->MemRecNFinalizeMctNb =  MemRecNFinalizeMctDA;
-  NBPtr->IsSupported[DramModeBeforeDimmPres] = TRUE;
-  NBPtr->IsSupported[CheckClearOnDimmMirror] = TRUE;
-  MemRecNSwitchDctDA (NBPtr, 0);
-
-  return TRUE;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets the current DCT to work on.
- *   Should be called before accessing a certain DCT
- *   All data structures will be updated to point to the current DCT
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   Dct - ID of the target DCT
- *
- */
-
-VOID
-MemRecNSwitchDctDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Dct
-  )
-{
-  NBPtr->Dct = Dct & 1;
-  NBPtr->SPDPtr = &(NBPtr->AllNodeSPDPtr[Dct * MAX_DIMMS_PER_CHANNEL]);
-  NBPtr->DCTPtr = &(NBPtr->MCTPtr->DctData[NBPtr->Dct]);
-
-  MemRecNSwitchChannelDA (NBPtr, NBPtr->Channel);
-}
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets the current channel to work on.
- *   Should be called before accessing a certain channel
- *   All data structures will be updated to point to the current channel
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   Channel - ID of the target channel
- *
- */
-
-VOID
-MemRecNSwitchChannelDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Channel
-  )
-{
-  NBPtr->Channel = Channel & 1;
-  NBPtr->ChannelPtr = &(NBPtr->DCTPtr->ChData[NBPtr->Channel]);
-}
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets or set DQS timing during training.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   TrnDly - type of delay to be set
- *     @param[in]   DrbnVar - encoding of Dimm-Rank-Byte-Nibble to be accessed
- *                  (use either DIMM_BYTE_ACCESS(dimm,byte) or CS_NBBL_ACCESS(cs,nibble) to use this encoding
- *     @param[in]   Field - Value to be programmed
- *     @param[in]   IsSet - Indicates if the function will set or get
- *
- *     @return      value read, if the function is used as a "get"
- */
-
-UINT32
-STATIC
-MemRecNcmnGetSetTrainDlyDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar,
-  IN       UINT16 Field
-  )
-{
-  UINT16 Index;
-  UINT16 Offset;
-  UINT32 Value;
-  UINT32 Address;
-  UINT8 Dimm;
-  UINT8 Byte;
-
-  Dimm = DRBN_DIMM (DrbnVar);
-  Byte = DRBN_BYTE (DrbnVar);
-
-  ASSERT (Dimm < 4);
-  ASSERT (Byte < 8);
-
-  switch (TrnDly) {
-  case AccessRcvEnDly:
-    Index = 0x10;
-    break;
-  case AccessWrDqsDly:
-    Index = 0x30;
-    break;
-  case AccessWrDatDly:
-    Index = 0x01;
-    break;
-  case AccessRdDqsDly:
-    Index = 0x05;
-    break;
-  case AccessPhRecDly:
-    Index = 0x50;
-    break;
-  default:
-    Index = 0;
-    IDS_ERROR_TRAP;
-  }
-
-  switch (TrnDly) {
-  case AccessRcvEnDly:
-  case AccessWrDqsDly:
-    Index += (Dimm * 3);
-    if (Byte & 0x04) {
-      // if byte 4,5,6,7
-      Index += 0x10;
-    }
-    if (Byte & 0x02) {
-      // if byte 2,3,6,7
-      Index++;
-    }
-    Offset = 16 * (Byte % 2);
-    break;
-
-  case AccessRdDqsDly:
-    Field &= ~ 0x0001;
-  case AccessWrDatDly:
-    Index += (Dimm * 0x100);
-    // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need
-    // to run AccessPhRecDly sequence.
-  case AccessPhRecDly:
-    Index += (Byte / 4);
-    Offset = 8 * (Byte % 4);
-    break;
-  default:
-    Offset = 0;
-    IDS_ERROR_TRAP;
-  }
-
-  Address = Index;
-  MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-  while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-  Value = MemRecNGetBitFieldNb (NBPtr, BFDctAddlDataReg);
-
-  if (IsSet) {
-    if (TrnDly == AccessPhRecDly) {
-      Value = NBPtr->DctCachePtr->PhRecReg[Index & 0x03];
-    }
-
-    Value = ((UINT32)Field << Offset) | (Value & (~((UINT32)0xFF << Offset)));
-    MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
-    Address |= DCT_ACCESS_WRITE;
-    MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-    while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-
-    if (TrnDly == AccessPhRecDly) {
-      NBPtr->DctCachePtr->PhRecReg[Index & 0x03] = Value;
-    }
-  } else {
-    Value = (Value >> Offset) & 0xFF;
-  }
-
-  return Value;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets or sets a value to a bit field in a PCI register.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   IsSet - Indicates if the function will set or get
- *     @param[in]   FieldName - Name of field to be set
- *     @param[in]   Field - Value to be programmed
- *
- *     @return      value read, if the function is used as a "get"
- */
-
-UINT32
-STATIC
-MemRecNCmnGetSetFieldDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       BIT_FIELD_NAME FieldName,
-  IN       UINT32 Field
-  )
-{
-  SBDFO Address;
-  PCI_ADDR PciAddr;
-  UINT8 Type;
-  UINT32 Value;
-  UINT32 Highbit;
-  UINT32 Lowbit;
-  UINT32 Mask;
-
-  Value = 0;
-  if (FieldName < BFEndOfList) {
-    Address = NBPtr->NBRegTable[FieldName];
-    if (Address) {
-      Lowbit = TSEFO_END (Address);
-      Highbit = TSEFO_START (Address);
-      Type = TSEFO_TYPE (Address);
-
-      // If Fn2 and DCT1 selected, set Address to be 1xx
-      if (((Address & 0xF000) == 0x2000) && NBPtr->Dct) {
-        Address |= 0x0100;
-      }
-      if ((Address >> 29) == ((DCT_PHY_ACCESS << 1) | 1)) {
-        // Special DCT Phy access
-        Address &= 0x0FFFFFFF;
-        Lowbit = 0;
-        Highbit = 16;
-      } else {
-        // Normal DCT Phy access
-        Address = TSEFO_OFFSET (Address);
-      }
-
-
-      if (Type == NB_ACCESS) {
-        Address |= (((UINT32) (24 + 0)) << 15);
-        PciAddr.AddressValue = Address;
-        LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
-      } else if (Type == DCT_PHY_ACCESS) {
-        MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-        while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-
-        Value = MemRecNGetBitFieldNb (NBPtr, BFDctAddlDataReg);
-      } else {
-        IDS_ERROR_TRAP;
-      }
-
-      if (IsSet) {
-        // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-        if ((Highbit - Lowbit) != 31) {
-          Mask = (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
-        } else {
-          Mask = (UINT32)0xFFFFFFFF;
-        }
-        Value &= ~(Mask << Lowbit);
-        Value |= (Field & Mask) << Lowbit;
-
-        if (Type == NB_ACCESS) {
-          PciAddr.AddressValue = Address;
-          LibAmdPciWrite (AccessWidth32, PciAddr , &Value, &NBPtr->MemPtr->StdHeader);
-        } else if (Type == DCT_PHY_ACCESS) {
-          MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
-          Address |= DCT_ACCESS_WRITE;
-
-          MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-          while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-        } else {
-          IDS_ERROR_TRAP;
-        }
-      } else {
-        Value = Value >> Lowbit;  // Shift
-        // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-        if ((Highbit - Lowbit) != 31) {
-          Value &= (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
-        }
-      }
-    }
-  } else {
-    IDS_ERROR_TRAP;   // Invalid bit field index
-  }
-  return Value;
-}
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function initializes bit field translation table
- *
- *     @param[in,out]   *NBRegTable   - Pointer to the NB Table *
- */
-
-VOID
-STATIC
-MemRecNInitNBRegTableDA (
-  IN OUT   TSEFO *NBRegTable
-  )
-{
-  UINT16 i;
-  for (i = 0; i <= BFEndOfList; i++) {
-    NBRegTable[i] = 0;
-  }
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (0, 0x00), 31,  0, BFDevVendorIDReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (0, 0x60),  2,  0, BFNodeID);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x40), 31, 0, BFDramBaseReg0);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x44), 31, 0, BFDramLimitReg0);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x40), 31,  0, BFCSBaseAddr0Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x44), 31,  0, BFCSBaseAddr1Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x48), 31,  0, BFCSBaseAddr2Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x4C), 31,  0, BFCSBaseAddr3Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x50), 31,  0, BFCSBaseAddr4Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x54), 31,  0, BFCSBaseAddr5Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x58), 31,  0, BFCSBaseAddr6Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x5C), 31,  0, BFCSBaseAddr7Reg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x60), 31,  0, BFCSMask0Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x64), 31,  0, BFCSMask1Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x68), 31,  0, BFCSMask2Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x6C), 31,  0, BFCSMask3Reg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 31,  0, BFDramControlReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31,  0, BFDramInitRegReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x80), 31,  0, BFDramBankAddrReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 31,  0, BFDramMRSReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84),  9,  7, BFDramTerm);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 11, 10, BFDramTermDyn);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x88), 31,  0, BFDramTimingLoReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 31,  0, BFDramTimingHiReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 31,  0, BFDramConfigLoReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 31,  0, BFDramConfigHiReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x98), 31,  0, BFDctAddlOffsetReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x9C), 31,  0, BFDctAddlDataReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x98), 31, 31, BFDctAccessDone);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (3, 0xD4),  4,  0, BFNbFid);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 18, 18, BFDqsRcvEnTrain);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 31, 22, BFMaxLatency);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 15,  0, BFMrsAddress);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 18, 16, BFMrsBank);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 22, 20, BFMrsChipSel);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 26, 26, BFSendMrsCmd);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 27, 27, BFDeassertMemRstX);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 28, 28, BFAssertCke);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 29, 29, BFSendZQCmd);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 30, 30, BFSendCtrlWord);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31, 31, BFEnDramInit);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C),  7,  7, BFLevel);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 12, 12, BFMrsQoff);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 18, 18, BFDisAutoRefresh);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90),  0,  0, BFInitDram);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 16, 16, BFUnBuffDimm);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94),  8,  8, BFDdr3Mode);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94),  9,  9, BFLegacyBiosMode);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 11, 10, BFZqcsInterval);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 14, 14, BFDisDramInterface);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8),  6,  6, BFOdtSwizzle);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 15, 8, BFCtrlWordCS);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110),  8, 8, BFDramEnabled);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 31, 0, BFDctSelBaseAddrReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x114), 31, 0, BFDctSelBaseOffsetReg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C),  6,  2, BFMctWrLimit);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 12, 12, BFPrefCpuDis);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 13, 13, BFPrefIoDis);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 29, 29, BFFlushWrOnStpGnt);
-
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 31,  0, BFODCControl);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x04, 31,  0, BFAddrTmgControl);
-
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  0,  0, BFWrtLvTrEn);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  1,  1, BFWrtLvTrMode);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  5,  4, BFTrDimmSel);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 11,  8, BFWrLvOdt);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 12, 12, BFWrLvOdtEn);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 30, 30, BFDisAutoComp);
-
-}
-
-/*-----------------------------------------------------------------------------*/
-/**
- *     MemRecNIsIdSupportedDA
- *      This function matches the CPU_LOGICAL_ID with certain criteria to
- *      determine if it is supported by this NBBlock.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]       *LogicalIdPtr - Pointer to the CPU_LOGICAL_ID
- *
- */
-BOOLEAN
-STATIC
-MemRecNIsIdSupportedDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       CPU_LOGICAL_ID *LogicalIdPtr
-  )
-{
-
-  if ((LogicalIdPtr->Revision & (AMD_F10_BL_ALL | AMD_F10_DA_ALL)) != 0) {
-    return TRUE;
-  } else {
-    return FALSE;
-  }
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.h
deleted file mode 100644
index 0db57d2911..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/**
- * @file
- *
- * mnda.h
- *
- * Northbridge Ridgeback Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 6783 $ @e \$Date: 2008-07-17 13:07:51 -0500 (Thu, 17 Jul 2008) $
- *
- **/
-/*****************************************************************************
-  *
-  * Copyright (c) 2011, Advanced Micro Devices, Inc.
-  * All rights reserved.
-  *
-  * Redistribution and use in source and binary forms, with or without
-  * modification, are permitted provided that the following conditions are met:
-  *     * Redistributions of source code must retain the above copyright
-  *       notice, this list of conditions and the following disclaimer.
-  *     * Redistributions in binary form must reproduce the above copyright
-  *       notice, this list of conditions and the following disclaimer in the
-  *       documentation and/or other materials provided with the distribution.
-  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-  *       its contributors may be used to endorse or promote products derived
-  *       from this software without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  * ***************************************************************************
-  *
- */
-
-#ifndef _MRNDA_H_
-#define _MRNDA_H_
-
-/*----------------------------------------------------------------------------
- *   Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
- *
- *----------------------------------------------------------------------------
- */
-#define MAX_DCTS_PER_NODE_DA          2
-#define MAX_CHANNELS_PER_DCT_DA       1
-
-#define _4GB_RJ8    ((UINT32)4 << (30 - 8))
-#define MTRR_VALID  11
-
-/*-----------------------------------------------------------------------------
- *                         DEFINITIONS AND MACROS
- *
- *-----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                         TYPEDEFS, STRUCTURES, ENUMS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           FUNCTIONS PROTOTYPE
- *
- *----------------------------------------------------------------------------
- */
-
-BOOLEAN
-MemRecConstructNBBlockDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN OUT   MEM_DATA_STRUCT *MemPtr,
-  IN       UINT8 NodeID
-  );
-
-VOID
-MemRecNSwitchDctDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Dct
-  );
-
-VOID
-MemRecNSwitchChannelDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Channel
-  );
-
-VOID
-MemRecNFinalizeMctDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  );
-
-
-#endif  /* _MRNDA_H_ */
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnmctda.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnmctda.c
deleted file mode 100644
index 5f54642fbf..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnmctda.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/**
- * @file
- *
- * mrnmctda.c
- *
- * Northbridge DA MCT supporting functions Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 6783 $ @e \$Date: 2008-07-17 13:07:51 -0500 (Thu, 17 Jul 2008) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "mrport.h"
-#include "mm.h"
-#include "mn.h"
-#include "mrnda.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_DA_MRNMCTDA_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets final values in BUCFG and BUCFG2
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemRecNFinalizeMctDA (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  MEM_DATA_STRUCT *MemPtr;
-  S_UINT64 SMsr;
-
-  MemPtr = NBPtr->MemPtr;
-
-
-  // Recommended settings for F2x11C
-  MemRecNSetBitFieldNb (NBPtr, BFMctWrLimit, 16);
-  MemRecNSetBitFieldNb (NBPtr, BFPrefCpuDis, 0);
-  MemRecNSetBitFieldNb (NBPtr, BFPrefIoDis, 0);
-  MemRecNSetBitFieldNb (NBPtr, BFFlushWrOnStpGnt, 1);
-
-  LibAmdMsrRead (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  if (!NBPtr->ClToNbFlag) {
-    SMsr.lo &= ~((UINT32) 1 << 15);                // ClLinesToNbDis
-  }
-  LibAmdMsrWrite (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-
-  LibAmdMsrRead (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  SMsr.hi &= ~((UINT32) 1 << (48 - 32));               // WbEnhWsbDis
-  LibAmdMsrWrite (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-}
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.c
deleted file mode 100644
index 9479d8218a..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.c
+++ /dev/null
@@ -1,644 +0,0 @@
-/**
- * @file
- *
- * mrndr.c
- *
- * Common Northbridge  functions for Ridgeback Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 6783 $ @e \$Date: 2008-07-17 13:07:51 -0500 (Thu, 17 Jul 2008) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "cpuFamRegisters.h"
-#include "cpuRegisters.h"
-#include "cpuFamilyTranslation.h"
-#include "mrport.h"
-#include "mm.h"
-#include "mn.h"
-#include "mrndr.h"
-#include "heapManager.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_DR_MRNDR_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-#define SPLIT_CHANNEL   0x20000000
-#define CHANNEL_SELECT  0x10000000
-#define MAX_DELAYS    9   /* 8 data bytes + 1 ECC byte */
-#define MAX_DIMMS     4   /* 4 DIMMs per channel */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-VOID
-STATIC
-MemRecNInitNBRegTableDR (
-  IN OUT   TSEFO *NBRegTable
-  );
-
-UINT32
-STATIC
-MemRecNCmnGetSetFieldDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       BIT_FIELD_NAME FieldName,
-  IN       UINT32 Field
-  );
-
-UINT32
-STATIC
-MemRecNcmnGetSetTrainDlyDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar,
-  IN       UINT16 Field
-  );
-
-BOOLEAN
-STATIC
-MemRecNIsIdSupportedDr (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       CPU_LOGICAL_ID *LogicalIdPtr
-  );
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function initializes the northbridge block
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in,out]   *MemPtr  - Pointer to the MEM_DATA_STRUCT
- *     @param[in]       NodeID   - Node ID for this NB block
- *
- *     @return          TRUE  - This node is a RB and this NB block has been initialized
- *     @return          FALSE - This node is not a RB
- */
-
-BOOLEAN
-MemRecConstructNBBlockDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN OUT   MEM_DATA_STRUCT *MemPtr,
-  IN       UINT8 NodeID
-  )
-{
-  UINT8 Dct;
-  UINT8 Channel;
-  DIE_STRUCT *MCTPtr;
-  ALLOCATE_HEAP_PARAMS AllocHeapParams;
-
-  //
-  // Determine if this is the expected NB Type
-  //
-  GetLogicalIdOfSocket (MemPtr->DiesPerSystem[NodeID].SocketId, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid), &(MemPtr->StdHeader));
-  if (!MemRecNIsIdSupportedDr (NBPtr, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid))) {
-    return FALSE;
-  }
-
-  //
-  // Allocate buffer for DCT_STRUCTs and CH_DEF_STRUCTs
-  //
-  MCTPtr = &MemPtr->DiesPerSystem[NodeID];
-  AllocHeapParams.RequestedBufferSize = MAX_DCTS_PER_NODE_DR * (
-                                          sizeof (DCT_STRUCT) + (
-                                            MAX_CHANNELS_PER_DCT_DR * (
-                                              sizeof (CH_DEF_STRUCT) + (
-                                                MAX_DIMMS * MAX_DELAYS * NUMBER_OF_DELAY_TABLES
-                                              )
-                                            )
-                                          )
-                                        );
-  AllocHeapParams.BufferHandle = GENERATE_MEM_HANDLE (ALLOC_DCT_STRUCT_HANDLE, NodeID, 0, 0);
-  AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
-  if (HeapAllocateBuffer (&AllocHeapParams, &MemPtr->StdHeader) != AGESA_SUCCESS) {
-    return FALSE;
-  }
-
-  MCTPtr->DctCount = MAX_DCTS_PER_NODE_DR;
-  MCTPtr->DctData = (DCT_STRUCT *) AllocHeapParams.BufferPtr;
-  AllocHeapParams.BufferPtr += MAX_DCTS_PER_NODE_DR * sizeof (DCT_STRUCT);
-  for (Dct = 0; Dct < MAX_DCTS_PER_NODE_DR; Dct++) {
-    MCTPtr->DctData[Dct].Dct = Dct;
-    MCTPtr->DctData[Dct].ChannelCount = MAX_CHANNELS_PER_DCT_DR;
-    MCTPtr->DctData[Dct].ChData = (CH_DEF_STRUCT *) AllocHeapParams.BufferPtr;
-    MCTPtr->DctData[Dct].ChData[0].ChannelID = Dct;
-    AllocHeapParams.BufferPtr += MAX_CHANNELS_PER_DCT_DR * sizeof (CH_DEF_STRUCT);
-    for (Channel = 0; Channel < MAX_CHANNELS_PER_DCT_DR; Channel++) {
-      MCTPtr->DctData[Dct].ChData[Channel].RcvEnDlys = (UINT16 *) AllocHeapParams.BufferPtr;
-      AllocHeapParams.BufferPtr += (MAX_DIMMS * MAX_DELAYS) * 2;
-      MCTPtr->DctData[Dct].ChData[Channel].WrDqsDlys = AllocHeapParams.BufferPtr;
-      MCTPtr->DctData[Dct].ChData[Channel].Dct = Dct;
-      AllocHeapParams.BufferPtr += (MAX_DIMMS * MAX_DELAYS);
-    }
-  }
-
-  //
-  //  Initialize NB block's variables
-  //
-  NBPtr->MemPtr = MemPtr;
-  NBPtr->RefPtr = MemPtr->ParameterListPtr;
-  NBPtr->MCTPtr = MCTPtr;
-  NBPtr->SPDPtr = &MemPtr->SpdDataStructure[MemPtr->DiesPerSystem[NodeID].SocketId * MAX_CHANNELS_PER_SOCKET * MAX_DIMMS_PER_CHANNEL];
-  NBPtr->AllNodeSPDPtr = &MemPtr->SpdDataStructure[MemPtr->DiesPerSystem[NodeID].SocketId * MAX_CHANNELS_PER_SOCKET * MAX_DIMMS_PER_CHANNEL];
-
-  NBPtr->DctCachePtr = NBPtr->DctCache;
-
-  MemRecNInitNBRegTableDR (NBPtr->NBRegTable);
-  NBPtr->Dct = 0;
-  NBPtr->Channel = 0;
-  NBPtr->VarMtrrHiMsk = MemRecGetVarMtrrHiMsk (&(MemPtr->DiesPerSystem[NodeID].LogicalCpuid), &(MemPtr->StdHeader));
-
-  LibAmdMemFill (NBPtr->DctCache, 0, sizeof (NBPtr->DctCache), &NBPtr->MemPtr->StdHeader);
-  LibAmdMemFill (NBPtr->IsSupported, FALSE, sizeof (NBPtr->IsSupported), &NBPtr->MemPtr->StdHeader);
-
-  NBPtr->InitRecovery = MemRecNMemInitNb;
-
-  NBPtr->SwitchNodeRec = (VOID (*) (MEM_NB_BLOCK *, UINT8)) MemRecDefRet;
-  NBPtr->SwitchDCT = MemRecNSwitchDctDR;
-  NBPtr->SwitchChannel = MemRecNSwitchChannelDR;
-  NBPtr->SetMaxLatency = MemRecNSetMaxLatencyNb;
-  NBPtr->GetSysAddrRec = MemRecNGetMCTSysAddrNb;
-  NBPtr->SendMrsCmd = MemRecNSendMrsCmdNb;
-  NBPtr->sendZQCmd = MemRecNSendZQCmdNb;
-  NBPtr->SetDramOdtRec = MemRecNSetDramOdtNb;
-
-  NBPtr->GetBitField = MemRecNGetBitFieldNb;
-  NBPtr->SetBitField = MemRecNSetBitFieldNb;
-  NBPtr->GetTrainDly = MemRecNGetTrainDlyNb;
-  NBPtr->SetTrainDly = MemRecNSetTrainDlyNb;
-  NBPtr->MemRecNCmnGetSetFieldNb = MemRecNCmnGetSetFieldDR;
-  NBPtr->MemRecNcmnGetSetTrainDlyNb = MemRecNcmnGetSetTrainDlyDR;
-  NBPtr->MemRecNSwitchDctNb = MemRecNSwitchDctDR;
-  NBPtr->TrainingFlow = MemNRecTrainingFlowNb;
-  NBPtr->MemRecNFinalizeMctNb =  MemRecNFinalizeMctDR;
-  NBPtr->IsSupported[DramModeBeforeDimmPres] = TRUE;
-  NBPtr->IsSupported[CheckClearOnDimmMirror] = TRUE;
-  MemRecNSwitchDctDR (NBPtr, 0);
-
-  return TRUE;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets the current DCT to work on.
- *   Should be called before accessing a certain DCT
- *   All data structures will be updated to point to the current DCT
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   Dct - ID of the target DCT
- *
- */
-
-VOID
-MemRecNSwitchDctDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Dct
-  )
-{
-  NBPtr->Dct = Dct & 1;
-  NBPtr->SPDPtr = &(NBPtr->AllNodeSPDPtr[Dct * MAX_DIMMS_PER_CHANNEL]);
-  NBPtr->DCTPtr = &(NBPtr->MCTPtr->DctData[NBPtr->Dct]);
-
-  MemRecNSwitchChannelDR (NBPtr, NBPtr->Channel);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets the current channel to work on.
- *   Should be called before accessing a certain channel
- *   All data structures will be updated to point to the current channel
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   Channel - ID of the target channel
- *
- */
-
-VOID
-MemRecNSwitchChannelDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Channel
-  )
-{
-  NBPtr->Channel = Channel & 1;
-  NBPtr->ChannelPtr = &(NBPtr->DCTPtr->ChData[NBPtr->Channel]);
-}
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets or set DQS timing during training.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   TrnDly - type of delay to be set
- *     @param[in]   DrbnVar - encoding of Dimm-Rank-Byte-Nibble to be accessed
- *                  (use either DIMM_BYTE_ACCESS(dimm,byte) or CS_NBBL_ACCESS(cs,nibble) to use this encoding
- *     @param[in]   Field - Value to be programmed
- *     @param[in]   IsSet - Indicates if the function will set or get
- *
- *     @return      value read, if the function is used as a "get"
- */
-
-UINT32
-STATIC
-MemRecNcmnGetSetTrainDlyDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar,
-  IN       UINT16 Field
-  )
-{
-  UINT16 Index;
-  UINT16 Offset;
-  UINT32 Value;
-  UINT32 Address;
-  UINT8 Dimm;
-  UINT8 Byte;
-
-  Dimm = DRBN_DIMM (DrbnVar);
-  Byte = DRBN_BYTE (DrbnVar);
-
-  ASSERT (Dimm < 4);
-  ASSERT (Byte < 8);
-
-  switch (TrnDly) {
-  case AccessRcvEnDly:
-    Index = 0x10;
-    break;
-  case AccessWrDqsDly:
-    Index = 0x30;
-    break;
-  case AccessWrDatDly:
-    Index = 0x01;
-    break;
-  case AccessRdDqsDly:
-    Index = 0x05;
-    break;
-  case AccessPhRecDly:
-    Index = 0x50;
-    break;
-  default:
-    Index = 0;
-    IDS_ERROR_TRAP;
-  }
-
-  switch (TrnDly) {
-  case AccessRcvEnDly:
-  case AccessWrDqsDly:
-    Index += (Dimm * 3);
-    if (Byte & 0x04) {
-      // if byte 4,5,6,7
-      Index += 0x10;
-    }
-    if (Byte & 0x02) {
-      // if byte 2,3,6,7
-      Index++;
-    }
-    Offset = 16 * (Byte % 2);
-    break;
-
-  case AccessRdDqsDly:
-    Field &= ~ 0x0001;
-  case AccessWrDatDly:
-    Index += (Dimm * 0x100);
-    // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need
-    // to run AccessPhRecDly sequence.
-  case AccessPhRecDly:
-    Index += (Byte / 4);
-    Offset = 8 * (Byte % 4);
-    break;
-  default:
-    Offset = 0;
-    IDS_ERROR_TRAP;
-  }
-
-  Address = Index;
-  MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-  while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-  Value = MemRecNGetBitFieldNb (NBPtr, BFDctAddlDataReg);
-
-  if (IsSet) {
-    if (TrnDly == AccessPhRecDly) {
-      Value = NBPtr->DctCachePtr->PhRecReg[Index & 0x03];
-    }
-
-    Value = ((UINT32)Field << Offset) | (Value & (~((UINT32)0xFF << Offset)));
-    MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
-    Address |= DCT_ACCESS_WRITE;
-    MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-    while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-
-    if (TrnDly == AccessPhRecDly) {
-      NBPtr->DctCachePtr->PhRecReg[Index & 0x03] = Value;
-    }
-  } else {
-    Value = (Value >> Offset) & 0xFF;
-  }
-
-  return Value;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets or sets a value to a bit field in a PCI register.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   IsSet - Indicates if the function will set or get
- *     @param[in]   FieldName - Name of field to be set
- *     @param[in]   Field - Value to be programmed
- *
- *     @return      value read, if the function is used as a "get"
- */
-
-UINT32
-STATIC
-MemRecNCmnGetSetFieldDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       BIT_FIELD_NAME FieldName,
-  IN       UINT32 Field
-  )
-{
-  SBDFO Address;
-  PCI_ADDR PciAddr;
-  UINT8 Type;
-  UINT32 Value;
-  UINT32 Highbit;
-  UINT32 Lowbit;
-  UINT32 Mask;
-
-  Value = 0;
-  if (FieldName < BFEndOfList) {
-    Address = NBPtr->NBRegTable[FieldName];
-    if (Address) {
-      Lowbit = TSEFO_END (Address);
-      Highbit = TSEFO_START (Address);
-      Type = TSEFO_TYPE (Address);
-
-      // If Fn2 and DCT1 selected, set Address to be 1xx
-      if (((Address & 0xF000) == 0x2000) && NBPtr->Dct) {
-        Address |= 0x0100;
-      }
-      if ((Address >> 29) == ((DCT_PHY_ACCESS << 1) | 1)) {
-        // Special DCT Phy access
-        Address &= 0x0FFFFFFF;
-        Lowbit = 0;
-        Highbit = 16;
-      } else {
-        // Normal DCT Phy access
-        Address = TSEFO_OFFSET (Address);
-      }
-
-
-      if (Type == NB_ACCESS) {
-        Address |= (((UINT32) (24 + 0)) << 15);
-        PciAddr.AddressValue = Address;
-        LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
-      } else if (Type == DCT_PHY_ACCESS) {
-        MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-        while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-
-        Value = MemRecNGetBitFieldNb (NBPtr, BFDctAddlDataReg);
-      } else {
-        IDS_ERROR_TRAP;
-      }
-
-      if (IsSet) {
-        // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-        if ((Highbit - Lowbit) != 31) {
-          Mask = (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
-        } else {
-          Mask = (UINT32)0xFFFFFFFF;
-        }
-        Value &= ~(Mask << Lowbit);
-        Value |= (Field & Mask) << Lowbit;
-
-        if (Type == NB_ACCESS) {
-          PciAddr.AddressValue = Address;
-          LibAmdPciWrite (AccessWidth32, PciAddr , &Value, &NBPtr->MemPtr->StdHeader);
-        } else if (Type == DCT_PHY_ACCESS) {
-          MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
-          Address |= DCT_ACCESS_WRITE;
-
-          MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-          while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-        } else {
-          IDS_ERROR_TRAP;
-        }
-      } else {
-        Value = Value >> Lowbit;  // Shift
-        // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-        if ((Highbit - Lowbit) != 31) {
-          Value &= (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
-        }
-      }
-    }
-  } else {
-    IDS_ERROR_TRAP;   // Invalid bit field index
-  }
-  return Value;
-}
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function initializes bit field translation table
- *
- *     @param[in,out]   *NBRegTable   - Pointer to the NB Table *
- */
-
-VOID
-STATIC
-MemRecNInitNBRegTableDR (
-  IN OUT   TSEFO *NBRegTable
-  )
-{
-  UINT16 i;
-  for (i = 0; i <= BFEndOfList; i++) {
-    NBRegTable[i] = 0;
-  }
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (0, 0x00), 31,  0, BFDevVendorIDReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (0, 0x60),  2,  0, BFNodeID);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x40), 31, 0, BFDramBaseReg0);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x44), 31, 0, BFDramLimitReg0);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x40), 31,  0, BFCSBaseAddr0Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x44), 31,  0, BFCSBaseAddr1Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x48), 31,  0, BFCSBaseAddr2Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x4C), 31,  0, BFCSBaseAddr3Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x50), 31,  0, BFCSBaseAddr4Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x54), 31,  0, BFCSBaseAddr5Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x58), 31,  0, BFCSBaseAddr6Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x5C), 31,  0, BFCSBaseAddr7Reg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x60), 31,  0, BFCSMask0Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x64), 31,  0, BFCSMask1Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x68), 31,  0, BFCSMask2Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x6C), 31,  0, BFCSMask3Reg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 31,  0, BFDramControlReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31,  0, BFDramInitRegReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x80), 31,  0, BFDramBankAddrReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 31,  0, BFDramMRSReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84),  9,  7, BFDramTerm);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 11, 10, BFDramTermDyn);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x88), 31,  0, BFDramTimingLoReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 31,  0, BFDramTimingHiReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 31,  0, BFDramConfigLoReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 31,  0, BFDramConfigHiReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x98), 31,  0, BFDctAddlOffsetReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x9C), 31,  0, BFDctAddlDataReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x98), 31, 31, BFDctAccessDone);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (3, 0xD4),  4,  0, BFNbFid);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 18, 18, BFDqsRcvEnTrain);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 31, 22, BFMaxLatency);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 15,  0, BFMrsAddress);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 18, 16, BFMrsBank);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 22, 20, BFMrsChipSel);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 26, 26, BFSendMrsCmd);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 27, 27, BFDeassertMemRstX);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 28, 28, BFAssertCke);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 29, 29, BFSendZQCmd);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 30, 30, BFSendCtrlWord);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31, 31, BFEnDramInit);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C),  7,  7, BFLevel);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 12, 12, BFMrsQoff);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 18, 18, BFDisAutoRefresh);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90),  0,  0, BFInitDram);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 16, 16, BFUnBuffDimm);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94),  8,  8, BFDdr3Mode);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94),  9,  9, BFLegacyBiosMode);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 11, 10, BFZqcsInterval);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 14, 14, BFDisDramInterface);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8),  5,  5, BFSubMemclkRegDly);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8),  6,  6, BFOdtSwizzle);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 15, 8, BFCtrlWordCS);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110),  8, 8, BFDramEnabled);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 31, 0, BFDctSelBaseAddrReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x114), 31, 0, BFDctSelBaseOffsetReg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C),  6,  2, BFMctWrLimit);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 12, 12, BFPrefCpuDis);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 13, 13, BFPrefIoDis);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 29, 29, BFFlushWrOnStpGnt);
-
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 31,  0, BFODCControl);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x04, 31,  0, BFAddrTmgControl);
-
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  0,  0, BFWrtLvTrEn);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  1,  1, BFWrtLvTrMode);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  5,  4, BFTrDimmSel);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 11,  8, BFWrLvOdt);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 12, 12, BFWrLvOdtEn);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 30, 30, BFDisAutoComp);
-
-}
-
-/*-----------------------------------------------------------------------------*/
-/**
- *     MemRecNIsIdSupportedDr
- *      This function matches the CPU_LOGICAL_ID with certain criteria to
- *      determine if it is supported by this NBBlock.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]       *LogicalIdPtr - Pointer to the CPU_LOGICAL_ID
- *
- */
-BOOLEAN
-STATIC
-MemRecNIsIdSupportedDr (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       CPU_LOGICAL_ID *LogicalIdPtr
-  )
-{
-
-  if ((LogicalIdPtr->Revision & (AMD_F10_RB_ALL
-                               | AMD_F10_BL_ALL
-                               | AMD_F10_DA_ALL )) != 0) {
-    return TRUE;
-  } else {
-    return FALSE;
-  }
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.h
deleted file mode 100644
index e4b11cda70..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/**
- * @file
- *
- * mndr.h
- *
- * Northbridge Ridgeback Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 6783 $ @e \$Date: 2008-07-17 13:07:51 -0500 (Thu, 17 Jul 2008) $
- *
- **/
-/*****************************************************************************
-  *
-  * Copyright (c) 2011, Advanced Micro Devices, Inc.
-  * All rights reserved.
-  *
-  * Redistribution and use in source and binary forms, with or without
-  * modification, are permitted provided that the following conditions are met:
-  *     * Redistributions of source code must retain the above copyright
-  *       notice, this list of conditions and the following disclaimer.
-  *     * Redistributions in binary form must reproduce the above copyright
-  *       notice, this list of conditions and the following disclaimer in the
-  *       documentation and/or other materials provided with the distribution.
-  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-  *       its contributors may be used to endorse or promote products derived
-  *       from this software without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  * ***************************************************************************
-  *
- */
-
-#ifndef _MRNDR_H_
-#define _MRNDR_H_
-
-/*----------------------------------------------------------------------------
- *   Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
- *
- *----------------------------------------------------------------------------
- */
-#define MAX_DCTS_PER_NODE_DR          2
-#define MAX_CHANNELS_PER_DCT_DR       1
-
-#define _4GB_RJ8    ((UINT32)4 << (30 - 8))
-#define MTRR_VALID  11
-
-/*-----------------------------------------------------------------------------
- *                         DEFINITIONS AND MACROS
- *
- *-----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                         TYPEDEFS, STRUCTURES, ENUMS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           FUNCTIONS PROTOTYPE
- *
- *----------------------------------------------------------------------------
- */
-
-BOOLEAN
-MemRecConstructNBBlockDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN OUT   MEM_DATA_STRUCT *MemPtr,
-  IN       UINT8 NodeID
-  );
-
-VOID
-MemRecNSwitchDctDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Dct
-  );
-
-VOID
-MemRecNSwitchChannelDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Channel
-  );
-
-VOID
-MemRecNFinalizeMctDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  );
-
-#endif  /* _MRNDR_H_ */
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrnmctdr.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrnmctdr.c
deleted file mode 100644
index 6803c3c483..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrnmctdr.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/**
- * @file
- *
- * mrnmctdr.c
- *
- * Northbridge DR MCT supporting functions Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 6783 $ @e \$Date: 2008-07-17 13:07:51 -0500 (Thu, 17 Jul 2008) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "mrport.h"
-#include "mm.h"
-#include "mn.h"
-#include "mt.h"
-#include "mrndr.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_DR_MRNMCTDR_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets final values in BUCFG and BUCFG2
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemRecNFinalizeMctDR (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  MEM_DATA_STRUCT *MemPtr;
-  S_UINT64 SMsr;
-
-  MemPtr = NBPtr->MemPtr;
-
-
-  // Recommended settings for F2x11C
-  MemRecNSetBitFieldNb (NBPtr, BFMctWrLimit, 16);
-  MemRecNSetBitFieldNb (NBPtr, BFPrefCpuDis, 0);
-  MemRecNSetBitFieldNb (NBPtr, BFPrefIoDis, 0);
-  MemRecNSetBitFieldNb (NBPtr, BFFlushWrOnStpGnt, 1);
-
-  LibAmdMsrRead (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  if (!NBPtr->ClToNbFlag) {
-    SMsr.lo &= ~((UINT32) 1 << 15);                // ClLinesToNbDis
-  }
-  LibAmdMsrWrite (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-
-  LibAmdMsrRead (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  SMsr.hi &= ~((UINT32) 1 << (48 - 32));               // WbEnhWsbDis
-  LibAmdMsrWrite (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-}
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrndcthy.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrndcthy.c
deleted file mode 100644
index 0227a4b7f9..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrndcthy.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/**
- * @file
- *
- * mrndctHy.c
- *
- * Northbridge DCT support for Hydra Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "OptionMemory.h"
-#include "PlatformMemoryConfiguration.h"
-#include "Ids.h"
-#include "mm.h"
-#include "mn.h"
-#include "mt.h"
-#include "mru.h"
-#include "mrnhy.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_HY_MRNDCTHY_FILECODE
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   Set Dram ODT for mission mode and write leveling mode.
- *
- *     @param[in,out]   *NBPtr     - Pointer to the MEM_NB_BLOCK
- *     @param[in]       OdtMode    - Mission mode or write leveling mode
- *     @param[in]       ChipSelect - Chip select number
- *     @param[in]       TargetCS   - Chip select number that is being trained
- *
- */
-
-VOID
-MemRecNSetDramOdtHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       ODT_MODE OdtMode,
-  IN       UINT8 ChipSelect,
-  IN       UINT8 TargetCS
-  )
-{
-  UINT8 Dimms;
-  UINT8 *DimmsPerChPtr;
-  UINT8 MaxDimmsPerChannel;
-  UINT8 DramTerm;
-  UINT8 DramTermDyn;
-  UINT8 WrLvOdt;
-  BOOLEAN IsDualRank;
-
-  Dimms = NBPtr->ChannelPtr->Dimms;
-  IsDualRank = ((NBPtr->ChannelPtr->DimmDrPresent & (UINT8) 1 << (ChipSelect >> 1)) != 0) ? TRUE : FALSE;
-
-  // Dram nominal termination
-  if (Dimms == 1) {
-    DramTerm = 1;   // 60 Ohms
-  } else {
-    DramTerm = 3;   // 40 Ohms
-  }
-
-  // Dram dynamic termination
-  if (Dimms < 2) {
-    DramTermDyn = 0;    // Disabled
-  } else {
-    DramTermDyn = 2;    // 120 Ohms
-  }
-
-  if (OdtMode == WRITE_LEVELING_MODE) {
-    if (ChipSelect == TargetCS) {
-      DramTerm = DramTermDyn;
-
-      // Program WrLvOdt, the target DIMM should be the closest DIMM.
-      DimmsPerChPtr = MemRecFindPSOverrideEntry (NBPtr->RefPtr->PlatformMemoryConfiguration, PSO_MAX_DIMMS, 0, NBPtr->ChannelPtr->ChannelID);
-      if (DimmsPerChPtr != NULL) {
-        MaxDimmsPerChannel = *DimmsPerChPtr;
-      } else {
-        MaxDimmsPerChannel = 2;
-      }
-
-      if (MaxDimmsPerChannel == 3) {
-        if (NBPtr->ChannelPtr->DimmQrPresent != 0) {
-          WrLvOdt = 0xF;
-        } else {
-          WrLvOdt = 7;
-        }
-      } else {
-        if (NBPtr->ChannelPtr->DimmQrPresent != 0) {
-          WrLvOdt = 0xB;
-        } else if (Dimms == 2) {
-          WrLvOdt = 3;
-        } else if (IsDualRank) {
-          WrLvOdt = 8;
-        } else {
-          WrLvOdt = 2;
-        }
-      }
-      MemRecNSetBitFieldNb (NBPtr, BFWrLvOdt, WrLvOdt);
-    }
-  }
-  MemRecNSetBitFieldNb (NBPtr, BFDramTerm, DramTerm);
-  MemRecNSetBitFieldNb (NBPtr, BFDramTermDyn, DramTermDyn);
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.c
deleted file mode 100644
index cc4fb6324d..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.c
+++ /dev/null
@@ -1,700 +0,0 @@
-/**
- * @file
- *
- * mrnhy.c
- *
- * Common Northbridge  functions for Hydra Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "mrport.h"
-#include "cpuFamRegisters.h"
-#include "cpuRegisters.h"
-#include "cpuFamilyTranslation.h"
-#include "mm.h"
-#include "mn.h"
-#include "mrnhy.h"
-#include "heapManager.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_HY_MRNHY_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-#define MAX_DCTS_PER_DIE 2
-#define SPLIT_CHANNEL   0x20000000
-#define CHANNEL_SELECT  0x10000000
-#define MAX_DELAYS    9   /* 8 data bytes + 1 ECC byte */
-#define MAX_DIMMS     4   /* 4 DIMMs per channel */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-VOID
-STATIC
-MemRecNInitNBRegTableHy (
-  IN OUT   TSEFO *NBRegTable
-  );
-
-UINT32
-STATIC
-MemRecNCmnGetSetFieldHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       BIT_FIELD_NAME FieldName,
-  IN       UINT32 Field
-  );
-
-UINT32
-STATIC
-MemRecNcmnGetSetTrainDlyHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar,
-  IN       UINT16 Field
-  );
-
-BOOLEAN
-STATIC
-MemRecNIsIdSupportedHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       CPU_LOGICAL_ID *LogicalIdPtr
-  );
-
-VOID
-STATIC
-MemRecNSwitchNodeHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 NodeID
-  );
-
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function initializes the northbridge block
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in,out]   *MemPtr  - Pointer to the MEM_DATA_STRUCT
- *     @param[in]       NodeID   - Node ID for this NB block
- *
- *     @return          TRUE  - This node is a Hydra and this NB block has been initialized
- *     @return          FALSE - This node is not a Hydra
- */
-
-BOOLEAN
-MemRecConstructNBBlockHY (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN OUT   MEM_DATA_STRUCT *MemPtr,
-  IN       UINT8 NodeID
-  )
-{
-  UINT8 Dct;
-  UINT8 Channel;
-  DIE_STRUCT *MCTPtr;
-  ALLOCATE_HEAP_PARAMS AllocHeapParams;
-
-  //
-  // Determine if this is the expected NB Type
-  //
-  GetLogicalIdOfSocket (MemPtr->DiesPerSystem[NodeID].SocketId, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid), &(MemPtr->StdHeader));
-  if (!MemRecNIsIdSupportedHy (NBPtr, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid))) {
-    return FALSE;
-  }
-
-  //
-  // Allocate buffer for DCT_STRUCTs and CH_DEF_STRUCTs
-  //
-  MCTPtr = &MemPtr->DiesPerSystem[NodeID];
-  AllocHeapParams.RequestedBufferSize = MAX_DCTS_PER_NODE_HY * (
-                                          sizeof (DCT_STRUCT) + (
-                                            MAX_CHANNELS_PER_DCT_HY * (
-                                              sizeof (CH_DEF_STRUCT) + (
-                                                MAX_DIMMS * MAX_DELAYS * NUMBER_OF_DELAY_TABLES
-                                              )
-                                            )
-                                          )
-                                        );
-  AllocHeapParams.BufferHandle = GENERATE_MEM_HANDLE (ALLOC_DCT_STRUCT_HANDLE, NodeID, 0, 0);
-  AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
-  if (HeapAllocateBuffer (&AllocHeapParams, &MemPtr->StdHeader) != AGESA_SUCCESS) {
-    return FALSE;
-  }
-
-  MCTPtr->DctCount = MAX_DCTS_PER_NODE_HY;
-  MCTPtr->DctData = (DCT_STRUCT *) AllocHeapParams.BufferPtr;
-  MemPtr->DiesPerSystem[NodeID + 1].DctCount = MAX_DCTS_PER_NODE_HY;
-  MemPtr->DiesPerSystem[NodeID + 1].DctData = (DCT_STRUCT *) AllocHeapParams.BufferPtr;
-  AllocHeapParams.BufferPtr += MAX_DCTS_PER_NODE_HY * sizeof (DCT_STRUCT);
-  for (Dct = 0; Dct < MAX_DCTS_PER_NODE_HY; Dct++) {
-    MCTPtr->DctData[Dct].Dct = Dct;
-    MCTPtr->DctData[Dct].ChannelCount = MAX_CHANNELS_PER_DCT_HY;
-    MCTPtr->DctData[Dct].ChData = (CH_DEF_STRUCT *) AllocHeapParams.BufferPtr;
-    MCTPtr->DctData[Dct].ChData[0].ChannelID = (MCTPtr->DieId * 2) + Dct;
-    AllocHeapParams.BufferPtr += MAX_CHANNELS_PER_DCT_HY * sizeof (CH_DEF_STRUCT);
-    for (Channel = 0; Channel < MAX_CHANNELS_PER_DCT_HY; Channel++) {
-      MCTPtr->DctData[Dct].ChData[Channel].RcvEnDlys = (UINT16 *) AllocHeapParams.BufferPtr;
-      AllocHeapParams.BufferPtr += (MAX_DIMMS * MAX_DELAYS) * 2;
-      MCTPtr->DctData[Dct].ChData[Channel].WrDqsDlys = AllocHeapParams.BufferPtr;
-      MCTPtr->DctData[Dct].ChData[Channel].Dct = Dct;
-      AllocHeapParams.BufferPtr += (MAX_DIMMS * MAX_DELAYS);
-    }
-  }
-
-  //
-  //  Initialize NB block's variables
-  //
-  NBPtr->MemPtr = MemPtr;
-  NBPtr->RefPtr = MemPtr->ParameterListPtr;
-  NBPtr->MCTPtr = MCTPtr;
-  NBPtr->AllNodeMCTPtr = &MemPtr->DiesPerSystem[NodeID];
-  NBPtr->SPDPtr = &MemPtr->SpdDataStructure[MemPtr->DiesPerSystem[NodeID].SocketId * MAX_CHANNELS_PER_SOCKET * MAX_DIMMS_PER_CHANNEL];
-  NBPtr->AllNodeSPDPtr = &MemPtr->SpdDataStructure[MemPtr->DiesPerSystem[NodeID].SocketId * MAX_CHANNELS_PER_SOCKET * MAX_DIMMS_PER_CHANNEL];
-
-  NBPtr->DctCachePtr = NBPtr->DctCache;
-
-  MemRecNInitNBRegTableHy (NBPtr->NBRegTable);
-  NBPtr->Dct = 0;
-  NBPtr->Channel = 0;
-  NBPtr->VarMtrrHiMsk = MemRecGetVarMtrrHiMsk (&(MemPtr->DiesPerSystem[NodeID].LogicalCpuid), &(MemPtr->StdHeader));
-
-  LibAmdMemFill (NBPtr->DctCache, 0, sizeof (NBPtr->DctCache), &NBPtr->MemPtr->StdHeader);
-  LibAmdMemFill (NBPtr->IsSupported, FALSE, sizeof (NBPtr->IsSupported), &NBPtr->MemPtr->StdHeader);
-
-  NBPtr->InitRecovery = MemRecNMemInitNb;
-
-  NBPtr->SwitchNodeRec = MemRecNSwitchNodeHy;
-  NBPtr->SwitchDCT = MemRecNSwitchDctHy;
-  NBPtr->SwitchChannel = MemRecNSwitchChannelHy;
-  NBPtr->SetMaxLatency = MemRecNSetMaxLatencyNb;
-  NBPtr->GetSysAddrRec = MemRecNGetMCTSysAddrNb;
-  NBPtr->SendMrsCmd = MemRecNSendMrsCmdNb;
-  NBPtr->sendZQCmd = MemRecNSendZQCmdNb;
-  NBPtr->SetDramOdtRec = MemRecNSetDramOdtHy;
-
-  NBPtr->GetBitField = MemRecNGetBitFieldNb;
-  NBPtr->SetBitField = MemRecNSetBitFieldNb;
-  NBPtr->GetTrainDly = MemRecNGetTrainDlyNb;
-  NBPtr->SetTrainDly = MemRecNSetTrainDlyNb;
-
-  NBPtr->MemRecNCmnGetSetFieldNb = MemRecNCmnGetSetFieldHy;
-  NBPtr->MemRecNcmnGetSetTrainDlyNb = MemRecNcmnGetSetTrainDlyHy;
-  NBPtr->MemRecNSwitchDctNb = MemRecNSwitchDctHy;
-  NBPtr->TrainingFlow = MemNRecTrainingFlowNb;
-  NBPtr->MemRecNFinalizeMctNb =  MemRecNFinalizeMctHy;
-  NBPtr->IsSupported[DramModeAfterDimmPres] = TRUE;
-  MemRecNSwitchDctHy (NBPtr, 0);
-
-  return TRUE;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *
- *   This function sets the current die to work on.
- *   Should be called before accessing a certain die
- *   All data structures will be updated to point to the current node
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   NodeID - ID of the target die
- *
- */
-
-VOID
-STATIC
-MemRecNSwitchNodeHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 NodeID
-  )
-{
-  NBPtr->MCTPtr = &(NBPtr->AllNodeMCTPtr[NodeID]);
-  NBPtr->Node = NodeID;
-  NBPtr->MCTPtr->NodeId = NodeID;
-  MemRecNSwitchDctHy (NBPtr, NBPtr->Dct);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets the current DCT to work on.
- *   Should be called before accessing a certain DCT
- *   All data structures will be updated to point to the current DCT
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   Dct - ID of the target DCT
- *
- */
-
-VOID
-MemRecNSwitchDctHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Dct
-  )
-{
-  NBPtr->Dct = Dct & 1;
-  NBPtr->SPDPtr = &(NBPtr->AllNodeSPDPtr[(NBPtr->MCTPtr->NodeId * MAX_DCTS_PER_DIE + Dct) * MAX_DIMMS_PER_CHANNEL]);
-  NBPtr->DCTPtr = &(NBPtr->MCTPtr->DctData[NBPtr->Dct]);
-
-  MemRecNSwitchChannelHy (NBPtr, 0);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets the current channel to work on.
- *   Should be called before accessing a certain channel
- *   All data structures will be updated to point to the current channel
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   Channel - ID of the target channel
- *
- */
-
-VOID
-MemRecNSwitchChannelHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Channel
-  )
-{
-  NBPtr->Channel = 0;
-  NBPtr->ChannelPtr = &(NBPtr->DCTPtr->ChData[0]);
-}
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets or set DQS timing during training.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   TrnDly - type of delay to be set
- *     @param[in]   DrbnVar - encoding of Dimm-Rank-Byte-Nibble to be accessed
- *                  (use either DIMM_BYTE_ACCESS(dimm,byte) or CS_NBBL_ACCESS(cs,nibble) to use this encoding
- *     @param[in]   Field - Value to be programmed
- *     @param[in]   IsSet - Indicates if the function will set or get
- *
- *     @return      value read, if the function is used as a "get"
- */
-
-UINT32
-STATIC
-MemRecNcmnGetSetTrainDlyHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar,
-  IN       UINT16 Field
-  )
-{
-  UINT16 index;
-  UINT16 offset;
-  UINT32 value;
-  UINT32 address;
-  UINT8 DIMM;
-  UINT8 Rank;
-  UINT8 Byte;
-  UINT8 Nibble;
-
-  DIMM = DRBN_DIMM (DrbnVar);
-  Rank = DRBN_RANK (DrbnVar);
-  Byte = DRBN_BYTE (DrbnVar);
-  Nibble = DRBN_NBBL (DrbnVar);
-
-  switch (TrnDly) {
-  case AccessRcvEnDly:
-    index = 0x10;
-    break;
-  case AccessWrDqsDly:
-    index = 0x30;
-    break;
-  case AccessWrDatDly:
-    index = 0x01;
-    break;
-  case AccessRdDqsDly:
-    index = 0x05;
-    break;
-  case AccessPhRecDly:
-    index = 0x50;
-    break;
-  default:
-    index = 0;
-    IDS_ERROR_TRAP;
-  }
-
-  switch (TrnDly) {
-  case AccessRcvEnDly:
-  case AccessWrDqsDly:
-    index += (DIMM * 3);
-    if ((Byte & 0x04) != 0) {
-      // if byte 4,5,6,7
-      index += 0x10;
-    }
-    if ((Byte & 0x02) != 0) {
-      // if byte 2,3,6,7
-      index++;
-    }
-    if (Byte > 7) {
-      index += 2;
-    }
-    offset = 16 * (Byte % 2);
-    index |= (Rank << 8);
-    index |= (Nibble << 9);
-    break;
-
-  case AccessRdDqsDly:
-    Field &= ~ 0x0001;
-  case AccessWrDatDly:
-    index += (DIMM * 0x100);
-    if (Nibble != 0) {
-      if (Rank != 0) {
-        index += 0xA0;
-      } else {
-        index += 0x70;
-      }
-    } else if (Rank != 0) {
-      index += 0x60;
-    }
-    // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need
-    // to run AccessPhRecDly sequence.
-  case AccessPhRecDly:
-    index += (Byte / 4);
-    offset = 8 * (Byte % 4);
-    break;
-  default:
-    offset = 0;
-    IDS_ERROR_TRAP;
-  }
-
-  address = index;
-  MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, address);
-  while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-  value = MemRecNGetBitFieldNb (NBPtr, BFDctAddlDataReg);
-
-  if (IsSet != 0) {
-    if (TrnDly == AccessPhRecDly) {
-      value = NBPtr->DctCachePtr->PhRecReg[index & 0x03];
-    }
-
-    value = ((UINT32)Field << offset) | (value & (~((UINT32)0xFF << offset)));
-    MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, value);
-    address |= DCT_ACCESS_WRITE;
-    MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, address);
-    while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-
-    if (TrnDly == AccessPhRecDly) {
-      NBPtr->DctCachePtr->PhRecReg[index & 0x03] = value;
-    }
-  } else {
-    value = (value >> offset) & 0xFF;
-  }
-
-  return value;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets or sets a value to a bit field in a PCI register.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   FieldName - Name of Field to be set
- *     @param[in]   Field - Value to be programmed
- *     @param[in]   IsSet - Indicates if the function will set or get
- *
- *     @return      value read, if the function is used as a "get"
- */
-
-UINT32
-STATIC
-MemRecNCmnGetSetFieldHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       BIT_FIELD_NAME FieldName,
-  IN       UINT32 Field
-  )
-{
-  SBDFO Address;
-  PCI_ADDR PciAddr;
-  UINT8 Type;
-  UINT32 Value;
-  UINT32 Highbit;
-  UINT32 Lowbit;
-  UINT32 Mask;
-
-  Value = 0;
-  if (FieldName < BFEndOfList) {
-    Address = NBPtr->NBRegTable[FieldName];
-    if (Address != 0) {
-      Lowbit = TSEFO_END (Address);
-      Highbit = TSEFO_START (Address);
-      Type = TSEFO_TYPE (Address);
-
-      // If Fn2 and DCT1 selected, set Address to be 1xx
-      if (((Address & 0xF000) == 0x2000) && (NBPtr->Dct != 0)) {
-        Address |= 0x0100;
-      }
-      if ((Address >> 29) == ((DCT_PHY_ACCESS << 1) | 1)) {
-        // Special DCT Phy access
-        Address &= 0x0FFFFFFF;
-        Lowbit = 0;
-        Highbit = 16;
-      } else {
-        // Normal DCT Phy access
-        Address = TSEFO_OFFSET (Address);
-      }
-
-
-      if (Type == NB_ACCESS) {
-        // Address |= (((UINT32) (24 + 0)) << 15);
-        PciAddr.AddressValue = Address;
-        // Fix for MCM
-        PciAddr.Address.Device = NBPtr->MemPtr->DiesPerSystem[NBPtr->Node].PciAddr.Address.Device;
-        PciAddr.Address.Bus = NBPtr->MemPtr->DiesPerSystem[NBPtr->Node].PciAddr.Address.Bus;
-        PciAddr.Address.Segment = NBPtr->MemPtr->DiesPerSystem[NBPtr->Node].PciAddr.Address.Segment;
-        Address = PciAddr.AddressValue;
-        LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
-      } else if (Type == DCT_PHY_ACCESS) {
-        MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-        while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-
-        Value = MemRecNGetBitFieldNb (NBPtr, BFDctAddlDataReg);
-      } else {
-        IDS_ERROR_TRAP;
-      }
-
-      if (IsSet != 0) {
-        // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-        if ((Highbit - Lowbit) != 31) {
-          Mask = (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
-        } else {
-          Mask = (UINT32)0xFFFFFFFF;
-        }
-        Value &= ~(Mask << Lowbit);
-        Value |= (Field & Mask) << Lowbit;
-
-        if (Type == NB_ACCESS) {
-          PciAddr.AddressValue = Address;
-          LibAmdPciWrite (AccessWidth32, PciAddr , &Value, &NBPtr->MemPtr->StdHeader);
-        } else if (Type == DCT_PHY_ACCESS) {
-          MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
-          Address |= DCT_ACCESS_WRITE;
-
-          MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-          while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-        } else {
-          IDS_ERROR_TRAP;
-        }
-      } else {
-        Value = Value >> Lowbit;  // Shift
-        // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-        if ((Highbit - Lowbit) != 31) {
-          Value &= (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
-        }
-      }
-    }
-  } else {
-    IDS_ERROR_TRAP;   // Invalid bit field index
-  }
-  return Value;
-}
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function initializes bit field translation table
- *
-*     @param[in,out]   *NBRegTable   - Pointer to the NB Table *
- */
-
-VOID
-STATIC
-MemRecNInitNBRegTableHy (
-  IN OUT   TSEFO *NBRegTable
-  )
-{
-  UINT16 i;
-  for (i = 0; i <= BFEndOfList; i++) {
-    NBRegTable[i] = 0;
-  }
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (0, 0x00), 31,  0, BFDevVendorIDReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (0, 0x60),  2,  0, BFNodeID);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x40), 31, 0, BFDramBaseReg0);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x44), 31, 0, BFDramLimitReg0);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x40), 31,  0, BFCSBaseAddr0Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x44), 31,  0, BFCSBaseAddr1Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x48), 31,  0, BFCSBaseAddr2Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x4C), 31,  0, BFCSBaseAddr3Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x50), 31,  0, BFCSBaseAddr4Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x54), 31,  0, BFCSBaseAddr5Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x58), 31,  0, BFCSBaseAddr6Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x5C), 31,  0, BFCSBaseAddr7Reg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x60), 31,  0, BFCSMask0Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x64), 31,  0, BFCSMask1Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x68), 31,  0, BFCSMask2Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x6C), 31,  0, BFCSMask3Reg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 31,  0, BFDramControlReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31,  0, BFDramInitRegReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x80), 31,  0, BFDramBankAddrReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 31,  0, BFDramMRSReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84),  9,  7, BFDramTerm);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 11, 10, BFDramTermDyn);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x88), 31,  0, BFDramTimingLoReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 31,  0, BFDramTimingHiReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 31,  0, BFDramConfigLoReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 31,  0, BFDramConfigHiReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x98), 31,  0, BFDctAddlOffsetReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x9C), 31,  0, BFDctAddlDataReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x98), 31, 31, BFDctAccessDone);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (3, 0xD4),  4,  0, BFNbFid);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 18, 18, BFDqsRcvEnTrain);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 31, 22, BFMaxLatency);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 15,  0, BFMrsAddress);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 18, 16, BFMrsBank);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 22, 20, BFMrsChipSel);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 26, 26, BFSendMrsCmd);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 27, 27, BFDeassertMemRstX);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 28, 28, BFAssertCke);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 29, 29, BFSendZQCmd);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 30, 30, BFSendCtrlWord);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31, 31, BFEnDramInit);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C),  7,  7, BFLevel);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 12, 12, BFMrsQoff);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 18, 18, BFDisAutoRefresh);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90),  0,  0, BFInitDram);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 16, 16, BFUnBuffDimm);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94),  8,  8, BFDdr3Mode);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94),  9,  9, BFLegacyBiosMode);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 11, 10, BFZqcsInterval);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 14, 14, BFDisDramInterface);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8),  5,  5, BFSubMemclkRegDly);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8),  6,  6, BFOdtSwizzle);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 15, 8, BFCtrlWordCS);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110),  8, 8, BFDramEnabled);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 31, 0, BFDctSelBaseAddrReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x114), 31, 0, BFDctSelBaseOffsetReg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 31,  0, BFMctCfgHiReg);
-
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 31,  0, BFODCControl);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x04, 31,  0, BFAddrTmgControl);
-
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  0,  0, BFWrtLvTrEn);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  1,  1, BFWrtLvTrMode);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  5,  4, BFTrDimmSel);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 11,  8, BFWrLvOdt);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 12, 12, BFWrLvOdtEn);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 30, 30, BFDisAutoComp);
-
-}
-
-/*-----------------------------------------------------------------------------*/
-/**
- *     MemRecNIsIdSupportedHy
- *      This function matches the CPU_LOGICAL_ID with certain criteria to
- *      determine if it is supported by this NBBlock.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]       *LogicalIdPtr - Pointer to the CPU_LOGICAL_ID
- *
- *     @return          TRUE -  This node is a Hydra.
- *     @return          FALSE - This node is not a Hydra.
- *
- */
-BOOLEAN
-STATIC
-MemRecNIsIdSupportedHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       CPU_LOGICAL_ID *LogicalIdPtr
-  )
-{
-  if ((LogicalIdPtr->Revision & AMD_F10_HY_ALL) != 0) {
-    return TRUE;
-  } else {
-    return FALSE;
-  }
-}
\ No newline at end of file
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.h
deleted file mode 100644
index 1b68d55321..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/**
- * @file
- *
- * mnhy.h
- *
- * Northbridge Hydra Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-  *
-  * Copyright (c) 2011, Advanced Micro Devices, Inc.
-  * All rights reserved.
-  *
-  * Redistribution and use in source and binary forms, with or without
-  * modification, are permitted provided that the following conditions are met:
-  *     * Redistributions of source code must retain the above copyright
-  *       notice, this list of conditions and the following disclaimer.
-  *     * Redistributions in binary form must reproduce the above copyright
-  *       notice, this list of conditions and the following disclaimer in the
-  *       documentation and/or other materials provided with the distribution.
-  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-  *       its contributors may be used to endorse or promote products derived
-  *       from this software without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  * ***************************************************************************
-  *
- */
-
-#ifndef _MRNHY_H_
-#define _MRNHY_H_
-
-/*----------------------------------------------------------------------------
- *   Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
- *
- *----------------------------------------------------------------------------
- */
-#define MAX_DCTS_PER_NODE_HY          2
-#define MAX_CHANNELS_PER_DCT_HY       1
-
-#define _4GB_RJ8    ((UINT32)4 << (30 - 8))
-#define MTRR_VALID  11
-
-/*-----------------------------------------------------------------------------
- *                         DEFINITIONS AND MACROS
- *
- *-----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                         TYPEDEFS, STRUCTURES, ENUMS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           FUNCTIONS PROTOTYPE
- *
- *----------------------------------------------------------------------------
- */
-
-BOOLEAN
-MemRecConstructNBBlockHY (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN OUT   MEM_DATA_STRUCT *MemPtr,
-  IN       UINT8 NodeID
-  );
-
-VOID
-MemRecNSwitchDctHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Dct
-  );
-
-VOID
-MemRecNSwitchChannelHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Channel
-  );
-
-VOID
-MemRecNSetDramOdtHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       ODT_MODE OdtMode,
-  IN       UINT8 ChipSelect,
-  IN       UINT8 TargetCS
-  );
-
-VOID
-MemRecNFinalizeMctHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  );
-
-#endif  /* _MRNHY_H_ */
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnmcthy.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnmcthy.c
deleted file mode 100644
index 75566b384c..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnmcthy.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/**
- * @file
- *
- * mrnmctdr.c
- *
- * Northbridge DR MCT supporting functions Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "mrport.h"
-#include "mm.h"
-#include "mn.h"
-#include "mrnhy.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_HY_MRNMCTHY_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets final values in BUCFG and BUCFG2
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemRecNFinalizeMctHy (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  MEM_DATA_STRUCT *MemPtr;
-  S_UINT64 SMsr;
-
-  MemPtr = NBPtr->MemPtr;
-
-  // Recommended settings for F2x11C
-  MemRecNSetBitFieldNb (NBPtr, BFMctCfgHiReg, 0x2CE00F60);
-
-  LibAmdMsrRead (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  if (!NBPtr->ClToNbFlag) {
-    SMsr.lo &= ~((UINT32) 1 << 15);                // ClLinesToNbDis
-  }
-  LibAmdMsrWrite (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-
-  LibAmdMsrRead (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  SMsr.hi &= ~((UINT32) 1 << (48 - 32));               // WbEnhWsbDis
-  LibAmdMsrWrite (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-}
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnprotohy.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnprotohy.c
deleted file mode 100644
index c939b06116..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnprotohy.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/**
- * @file
- *
- * mrnproto.c
- *
- * Northbridge support functions for Errata and early samples Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-
-
-#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_HY_MRNPROTOHY_FILECODE
-/*
- *-----------------------------------------------------------------------------
- *                                EXPORTED FUNCTIONS
- *
- *-----------------------------------------------------------------------------
- */
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.c
deleted file mode 100644
index a8cb8a4c1f..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.c
+++ /dev/null
@@ -1,641 +0,0 @@
-/**
- * @file
- *
- * mrnNi.c
- *
- * Common Northbridge  functions for Nile Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 6783 $ @e \$Date: 2008-07-17 13:07:51 -0500 (Thu, 17 Jul 2008) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "cpuFamRegisters.h"
-#include "cpuRegisters.h"
-#include "cpuFamilyTranslation.h"
-#include "mrport.h"
-#include "mm.h"
-#include "mn.h"
-#include "mrnda.h"
-#include "mrnNi.h"
-#include "heapManager.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_NI_MRNNI_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-#define SPLIT_CHANNEL   0x20000000
-#define CHANNEL_SELECT  0x10000000
-#define MAX_DELAYS    9   /* 8 data bytes + 1 ECC byte */
-#define MAX_DIMMS     4   /* 4 DIMMs per channel */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-VOID
-STATIC
-MemRecNInitNBRegTableNi (
-  IN OUT   TSEFO *NBRegTable
-  );
-
-UINT32
-STATIC
-MemRecNCmnGetSetFieldNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       BIT_FIELD_NAME FieldName,
-  IN       UINT32 Field
-  );
-
-UINT32
-STATIC
-MemRecNcmnGetSetTrainDlyNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar,
-  IN       UINT16 Field
-  );
-
-BOOLEAN
-STATIC
-MemRecNIsIdSupportedNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       CPU_LOGICAL_ID *LogicalIdPtr
-  );
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function initializes the northbridge block
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in,out]   *MemPtr  - Pointer to the MEM_DATA_STRUCT
- *     @param[in]       NodeID   - Node ID for this NB block
- *
- *     @return          TRUE  - This node is a RB and this NB block has been initialized
- *     @return          FALSE - This node is not a RB
- */
-
-BOOLEAN
-MemRecConstructNBBlockNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN OUT   MEM_DATA_STRUCT *MemPtr,
-  IN       UINT8 NodeID
-  )
-{
-  UINT8 Dct;
-  UINT8 Channel;
-  DIE_STRUCT *MCTPtr;
-  ALLOCATE_HEAP_PARAMS AllocHeapParams;
-
-  //
-  // Determine if this is the expected NB Type
-  //
-  GetLogicalIdOfSocket (MemPtr->DiesPerSystem[NodeID].SocketId, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid), &(MemPtr->StdHeader));
-  if (!MemRecNIsIdSupportedNi (NBPtr, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid))) {
-    return FALSE;
-  }
-
-  //
-  // Allocate buffer for DCT_STRUCTs and CH_DEF_STRUCTs
-  //
-  MCTPtr = &MemPtr->DiesPerSystem[NodeID];
-  AllocHeapParams.RequestedBufferSize = MAX_DCTS_PER_NODE_DA * (
-                                          sizeof (DCT_STRUCT) + (
-                                            MAX_CHANNELS_PER_DCT_DA * (
-                                              sizeof (CH_DEF_STRUCT) + (
-                                                MAX_DIMMS * MAX_DELAYS * NUMBER_OF_DELAY_TABLES
-                                              )
-                                            )
-                                          )
-                                        );
-  AllocHeapParams.BufferHandle = GENERATE_MEM_HANDLE (ALLOC_DCT_STRUCT_HANDLE, NodeID, 0, 0);
-  AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
-  if (HeapAllocateBuffer (&AllocHeapParams, &MemPtr->StdHeader) != AGESA_SUCCESS) {
-    return FALSE;
-  }
-
-  MCTPtr->DctCount = MAX_DCTS_PER_NODE_DA;
-  MCTPtr->DctData = (DCT_STRUCT *) AllocHeapParams.BufferPtr;
-  AllocHeapParams.BufferPtr += MAX_DCTS_PER_NODE_DA * sizeof (DCT_STRUCT);
-  for (Dct = 0; Dct < MAX_DCTS_PER_NODE_DA; Dct++) {
-    MCTPtr->DctData[Dct].Dct = Dct;
-    MCTPtr->DctData[Dct].ChannelCount = MAX_CHANNELS_PER_DCT_DA;
-    MCTPtr->DctData[Dct].ChData = (CH_DEF_STRUCT *) AllocHeapParams.BufferPtr;
-    MCTPtr->DctData[Dct].ChData[0].ChannelID = Dct;
-    AllocHeapParams.BufferPtr += MAX_CHANNELS_PER_DCT_DA * sizeof (CH_DEF_STRUCT);
-    for (Channel = 0; Channel < MAX_CHANNELS_PER_DCT_DA; Channel++) {
-      MCTPtr->DctData[Dct].ChData[Channel].RcvEnDlys = (UINT16 *) AllocHeapParams.BufferPtr;
-      AllocHeapParams.BufferPtr += (MAX_DIMMS * MAX_DELAYS) * 2;
-      MCTPtr->DctData[Dct].ChData[Channel].WrDqsDlys = AllocHeapParams.BufferPtr;
-      MCTPtr->DctData[Dct].ChData[Channel].Dct = Dct;
-      AllocHeapParams.BufferPtr += (MAX_DIMMS * MAX_DELAYS);
-    }
-  }
-
-  //
-  //  Initialize NB block's variables
-  //
-  NBPtr->MemPtr = MemPtr;
-  NBPtr->RefPtr = MemPtr->ParameterListPtr;
-  NBPtr->MCTPtr = MCTPtr;
-  NBPtr->SPDPtr = &MemPtr->SpdDataStructure[MemPtr->DiesPerSystem[NodeID].SocketId * MAX_CHANNELS_PER_SOCKET * MAX_DIMMS_PER_CHANNEL];
-  NBPtr->AllNodeSPDPtr = &MemPtr->SpdDataStructure[MemPtr->DiesPerSystem[NodeID].SocketId * MAX_CHANNELS_PER_SOCKET * MAX_DIMMS_PER_CHANNEL];
-
-  NBPtr->DctCachePtr = NBPtr->DctCache;
-
-  MemRecNInitNBRegTableNi (NBPtr->NBRegTable);
-  NBPtr->Dct = 0;
-  NBPtr->Channel = 0;
-  NBPtr->VarMtrrHiMsk = MemRecGetVarMtrrHiMsk (&(MemPtr->DiesPerSystem[NodeID].LogicalCpuid), &(MemPtr->StdHeader));
-
-  LibAmdMemFill (NBPtr->DctCache, 0, sizeof (NBPtr->DctCache), &NBPtr->MemPtr->StdHeader);
-  LibAmdMemFill (NBPtr->IsSupported, FALSE, sizeof (NBPtr->IsSupported), &NBPtr->MemPtr->StdHeader);
-
-  NBPtr->InitRecovery = MemRecNMemInitNb;
-
-  NBPtr->SwitchNodeRec = (VOID (*) (MEM_NB_BLOCK *, UINT8)) MemRecDefRet;
-  NBPtr->SwitchDCT = MemRecNSwitchDctNi;
-  NBPtr->SwitchChannel = MemRecNSwitchChannelNi;
-  NBPtr->SetMaxLatency = MemRecNSetMaxLatencyNb;
-  NBPtr->GetSysAddrRec = MemRecNGetMCTSysAddrNb;
-  NBPtr->SendMrsCmd = MemRecNSendMrsCmdNb;
-  NBPtr->sendZQCmd = MemRecNSendZQCmdNb;
-  NBPtr->SetDramOdtRec = MemRecNSetDramOdtNb;
-
-  NBPtr->GetBitField = MemRecNGetBitFieldNb;
-  NBPtr->SetBitField = MemRecNSetBitFieldNb;
-  NBPtr->GetTrainDly = MemRecNGetTrainDlyNb;
-  NBPtr->SetTrainDly = MemRecNSetTrainDlyNb;
-  NBPtr->MemRecNCmnGetSetFieldNb = MemRecNCmnGetSetFieldNi;
-  NBPtr->MemRecNcmnGetSetTrainDlyNb = MemRecNcmnGetSetTrainDlyNi;
-  NBPtr->MemRecNSwitchDctNb = MemRecNSwitchDctNi;
-  NBPtr->TrainingFlow = MemNRecTrainingFlowNb;
-  NBPtr->MemRecNFinalizeMctNb =  MemRecNFinalizeMctDA;
-  NBPtr->IsSupported[DramModeBeforeDimmPres] = TRUE;
-  NBPtr->IsSupported[CheckClearOnDimmMirror] = TRUE;
-  MemRecNSwitchDctNi (NBPtr, 0);
-
-  return TRUE;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets the current DCT to work on.
- *   Should be called before accessing a certain DCT
- *   All data structures will be updated to point to the current DCT
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   Dct - ID of the target DCT
- *
- */
-
-VOID
-MemRecNSwitchDctNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Dct
-  )
-{
-  NBPtr->Dct = Dct & 1;
-  NBPtr->SPDPtr = &(NBPtr->AllNodeSPDPtr[Dct * MAX_DIMMS_PER_CHANNEL]);
-  NBPtr->DCTPtr = &(NBPtr->MCTPtr->DctData[NBPtr->Dct]);
-
-  MemRecNSwitchChannelNi (NBPtr, NBPtr->Channel);
-}
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets the current channel to work on.
- *   Should be called before accessing a certain channel
- *   All data structures will be updated to point to the current channel
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   Channel - ID of the target channel
- *
- */
-
-VOID
-MemRecNSwitchChannelNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Channel
-  )
-{
-  NBPtr->Channel = Channel & 1;
-  NBPtr->ChannelPtr = &(NBPtr->DCTPtr->ChData[NBPtr->Channel]);
-}
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets or set DQS timing during training.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   TrnDly - type of delay to be set
- *     @param[in]   DrbnVar - encoding of Dimm-Rank-Byte-Nibble to be accessed
- *                  (use either DIMM_BYTE_ACCESS(dimm,byte) or CS_NBBL_ACCESS(cs,nibble) to use this encoding
- *     @param[in]   Field - Value to be programmed
- *     @param[in]   IsSet - Indicates if the function will set or get
- *
- *     @return      value read, if the function is used as a "get"
- */
-
-UINT32
-STATIC
-MemRecNcmnGetSetTrainDlyNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar,
-  IN       UINT16 Field
-  )
-{
-  UINT16 Index;
-  UINT16 Offset;
-  UINT32 Value;
-  UINT32 Address;
-  UINT8 Dimm;
-  UINT8 Byte;
-
-  Dimm = DRBN_DIMM (DrbnVar);
-  Byte = DRBN_BYTE (DrbnVar);
-
-  ASSERT (Dimm < 4);
-  ASSERT (Byte < 8);
-
-  switch (TrnDly) {
-  case AccessRcvEnDly:
-    Index = 0x10;
-    break;
-  case AccessWrDqsDly:
-    Index = 0x30;
-    break;
-  case AccessWrDatDly:
-    Index = 0x01;
-    break;
-  case AccessRdDqsDly:
-    Index = 0x05;
-    break;
-  case AccessPhRecDly:
-    Index = 0x50;
-    break;
-  default:
-    Index = 0;
-    IDS_ERROR_TRAP;
-  }
-
-  switch (TrnDly) {
-  case AccessRcvEnDly:
-  case AccessWrDqsDly:
-    Index += (Dimm * 3);
-    if (Byte & 0x04) {
-      // if byte 4,5,6,7
-      Index += 0x10;
-    }
-    if (Byte & 0x02) {
-      // if byte 2,3,6,7
-      Index++;
-    }
-    Offset = 16 * (Byte % 2);
-    break;
-
-  case AccessRdDqsDly:
-    Field &= ~ 0x0001;
-  case AccessWrDatDly:
-    Index += (Dimm * 0x100);
-    // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need
-    // to run AccessPhRecDly sequence.
-  case AccessPhRecDly:
-    Index += (Byte / 4);
-    Offset = 8 * (Byte % 4);
-    break;
-  default:
-    Offset = 0;
-    IDS_ERROR_TRAP;
-  }
-
-  Address = Index;
-  MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-  while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-  Value = MemRecNGetBitFieldNb (NBPtr, BFDctAddlDataReg);
-
-  if (IsSet) {
-    if (TrnDly == AccessPhRecDly) {
-      Value = NBPtr->DctCachePtr->PhRecReg[Index & 0x03];
-    }
-
-    Value = ((UINT32)Field << Offset) | (Value & (~((UINT32)0xFF << Offset)));
-    MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
-    Address |= DCT_ACCESS_WRITE;
-    MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-    while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-
-    if (TrnDly == AccessPhRecDly) {
-      NBPtr->DctCachePtr->PhRecReg[Index & 0x03] = Value;
-    }
-  } else {
-    Value = (Value >> Offset) & 0xFF;
-  }
-
-  return Value;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets or sets a value to a bit field in a PCI register.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   IsSet - Indicates if the function will set or get
- *     @param[in]   FieldName - Name of field to be set
- *     @param[in]   Field - Value to be programmed
- *
- *     @return      value read, if the function is used as a "get"
- */
-
-UINT32
-STATIC
-MemRecNCmnGetSetFieldNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 IsSet,
-  IN       BIT_FIELD_NAME FieldName,
-  IN       UINT32 Field
-  )
-{
-  SBDFO Address;
-  PCI_ADDR PciAddr;
-  UINT8 Type;
-  UINT32 Value;
-  UINT32 Highbit;
-  UINT32 Lowbit;
-  UINT32 Mask;
-
-  Value = 0;
-  if (FieldName < BFEndOfList) {
-    Address = NBPtr->NBRegTable[FieldName];
-    if (Address) {
-      Lowbit = TSEFO_END (Address);
-      Highbit = TSEFO_START (Address);
-      Type = TSEFO_TYPE (Address);
-
-      // If Fn2 and DCT1 selected, set Address to be 1xx
-      if (((Address & 0xF000) == 0x2000) && NBPtr->Dct) {
-        Address |= 0x0100;
-      }
-      if ((Address >> 29) == ((DCT_PHY_ACCESS << 1) | 1)) {
-        // Special DCT Phy access
-        Address &= 0x0FFFFFFF;
-        Lowbit = 0;
-        Highbit = 16;
-      } else {
-        // Normal DCT Phy access
-        Address = TSEFO_OFFSET (Address);
-      }
-
-
-      if (Type == NB_ACCESS) {
-        Address |= (((UINT32) (24 + 0)) << 15);
-        PciAddr.AddressValue = Address;
-        LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
-      } else if (Type == DCT_PHY_ACCESS) {
-        MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-        while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-
-        Value = MemRecNGetBitFieldNb (NBPtr, BFDctAddlDataReg);
-      } else {
-        IDS_ERROR_TRAP;
-      }
-
-      if (IsSet) {
-        // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-        if ((Highbit - Lowbit) != 31) {
-          Mask = (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
-        } else {
-          Mask = (UINT32)0xFFFFFFFF;
-        }
-        Value &= ~(Mask << Lowbit);
-        Value |= (Field & Mask) << Lowbit;
-
-        if (Type == NB_ACCESS) {
-          PciAddr.AddressValue = Address;
-          LibAmdPciWrite (AccessWidth32, PciAddr , &Value, &NBPtr->MemPtr->StdHeader);
-        } else if (Type == DCT_PHY_ACCESS) {
-          MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
-          Address |= DCT_ACCESS_WRITE;
-
-          MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
-          while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
-        } else {
-          IDS_ERROR_TRAP;
-        }
-      } else {
-        Value = Value >> Lowbit;  // Shift
-        // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-        if ((Highbit - Lowbit) != 31) {
-          Value &= (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
-        }
-      }
-    }
-  } else {
-    IDS_ERROR_TRAP;   // Invalid bit field index
-  }
-  return Value;
-}
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function initializes bit field translation table
- *
- *     @param[in,out]   *NBRegTable   - Pointer to the NB Table *
- */
-
-VOID
-STATIC
-MemRecNInitNBRegTableNi (
-  IN OUT   TSEFO *NBRegTable
-  )
-{
-  UINT16 i;
-  for (i = 0; i <= BFEndOfList; i++) {
-    NBRegTable[i] = 0;
-  }
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (0, 0x00), 31,  0, BFDevVendorIDReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (0, 0x60),  2,  0, BFNodeID);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x40), 31, 0, BFDramBaseReg0);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x44), 31, 0, BFDramLimitReg0);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x40), 31,  0, BFCSBaseAddr0Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x44), 31,  0, BFCSBaseAddr1Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x48), 31,  0, BFCSBaseAddr2Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x4C), 31,  0, BFCSBaseAddr3Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x50), 31,  0, BFCSBaseAddr4Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x54), 31,  0, BFCSBaseAddr5Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x58), 31,  0, BFCSBaseAddr6Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x5C), 31,  0, BFCSBaseAddr7Reg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x60), 31,  0, BFCSMask0Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x64), 31,  0, BFCSMask1Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x68), 31,  0, BFCSMask2Reg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x6C), 31,  0, BFCSMask3Reg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 31,  0, BFDramControlReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31,  0, BFDramInitRegReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x80), 31,  0, BFDramBankAddrReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 31,  0, BFDramMRSReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84),  9,  7, BFDramTerm);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 11, 10, BFDramTermDyn);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x88), 31,  0, BFDramTimingLoReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 31,  0, BFDramTimingHiReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 31,  0, BFDramConfigLoReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 31,  0, BFDramConfigHiReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x98), 31,  0, BFDctAddlOffsetReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x9C), 31,  0, BFDctAddlDataReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x98), 31, 31, BFDctAccessDone);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (3, 0xD4),  4,  0, BFNbFid);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 18, 18, BFDqsRcvEnTrain);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 31, 22, BFMaxLatency);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 15,  0, BFMrsAddress);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 18, 16, BFMrsBank);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 22, 20, BFMrsChipSel);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 26, 26, BFSendMrsCmd);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 27, 27, BFDeassertMemRstX);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 28, 28, BFAssertCke);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 29, 29, BFSendZQCmd);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 30, 30, BFSendCtrlWord);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31, 31, BFEnDramInit);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C),  7,  7, BFLevel);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 12, 12, BFMrsQoff);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 18, 18, BFDisAutoRefresh);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90),  0,  0, BFInitDram);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 16, 16, BFUnBuffDimm);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94),  8,  8, BFDdr3Mode);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94),  9,  9, BFLegacyBiosMode);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 11, 10, BFZqcsInterval);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 14, 14, BFDisDramInterface);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8),  6,  6, BFOdtSwizzle);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 15, 8, BFCtrlWordCS);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110),  8, 8, BFDramEnabled);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 31, 0, BFDctSelBaseAddrReg);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x114), 31, 0, BFDctSelBaseOffsetReg);
-
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C),  6,  2, BFMctWrLimit);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 12, 12, BFPrefCpuDis);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 13, 13, BFPrefIoDis);
-  MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 29, 29, BFFlushWrOnStpGnt);
-
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 31,  0, BFODCControl);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x04, 31,  0, BFAddrTmgControl);
-
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  0,  0, BFWrtLvTrEn);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  1,  1, BFWrtLvTrMode);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08,  5,  4, BFTrDimmSel);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 11,  8, BFWrLvOdt);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 12, 12, BFWrLvOdtEn);
-  MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 30, 30, BFDisAutoComp);
-
-}
-
-/*-----------------------------------------------------------------------------*/
-/**
- *     MemRecNIsIdSupportedNi
- *      This function matches the CPU_LOGICAL_ID with certain criteria to
- *      determine if it is supported by this NBBlock.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]       *LogicalIdPtr - Pointer to the CPU_LOGICAL_ID
- *
- */
-BOOLEAN
-STATIC
-MemRecNIsIdSupportedNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       CPU_LOGICAL_ID *LogicalIdPtr
-  )
-{
-
-  if ((LogicalIdPtr->Revision & (AMD_F10_BL_ALL | AMD_F10_DA_ALL)) != 0) {
-    return TRUE;
-  } else {
-    return FALSE;
-  }
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.h
deleted file mode 100644
index 8804b7b037..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/**
- * @file
- *
- * mrnNi.h
- *
- * Northbridge Ni Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 6783 $ @e \$Date: 2008-07-17 13:07:51 -0500 (Thu, 17 Jul 2008) $
- *
- **/
-/*****************************************************************************
-  *
-  * Copyright (c) 2011, Advanced Micro Devices, Inc.
-  * All rights reserved.
-  *
-  * Redistribution and use in source and binary forms, with or without
-  * modification, are permitted provided that the following conditions are met:
-  *     * Redistributions of source code must retain the above copyright
-  *       notice, this list of conditions and the following disclaimer.
-  *     * Redistributions in binary form must reproduce the above copyright
-  *       notice, this list of conditions and the following disclaimer in the
-  *       documentation and/or other materials provided with the distribution.
-  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-  *       its contributors may be used to endorse or promote products derived
-  *       from this software without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  * ***************************************************************************
-  *
- */
-
-#ifndef _MRNNI_H_
-#define _MRNNI_H_
-
-/*----------------------------------------------------------------------------
- *   Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
- *
- *----------------------------------------------------------------------------
- */
-#define _4GB_RJ8    ((UINT32)4 << (30 - 8))
-#define MTRR_VALID  11
-
-/*-----------------------------------------------------------------------------
- *                         DEFINITIONS AND MACROS
- *
- *-----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                         TYPEDEFS, STRUCTURES, ENUMS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           FUNCTIONS PROTOTYPE
- *
- *----------------------------------------------------------------------------
- */
-
-BOOLEAN
-MemRecConstructNBBlockNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN OUT   MEM_DATA_STRUCT *MemPtr,
-  IN       UINT8 NodeID
-  );
-
-VOID
-MemRecNSwitchDctNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Dct
-  );
-
-VOID
-MemRecNSwitchChannelNi (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT8 Channel
-  );
-
-#endif  /* _MRNNI_H_ */
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrn.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrn.c
deleted file mode 100644
index d6b9011ab4..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrn.c
+++ /dev/null
@@ -1,188 +0,0 @@
-/**
- * @file
- *
- * mrn.c
- *
- * Common Northbridge  functions for Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem/NB)
- * @e \$Revision: 12594 $ @e \$Date: 2009-04-22 11:04:41 -0500 (Wed, 22 Apr 2009) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "cpuFamRegisters.h"
-#include "cpuRegisters.h"
-#include "cpuFamilyTranslation.h"
-#include "mm.h"
-#include "mn.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_MRN_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-#define MAX_DCTS_PER_DIE 2
-#define SPLIT_CHANNEL   0x20000000
-#define CHANNEL_SELECT  0x10000000
-#define MAX_DELAYS    9   /* 8 data bytes + 1 ECC byte */
-#define MAX_DIMMS     4   /* 4 DIMMs per channel */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets a bit field from PCI register
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   FieldName - Field name
- *
- *     @return      Bit field value
- */
-
-UINT32
-MemRecNGetBitFieldNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       BIT_FIELD_NAME FieldName
-  )
-{
-  return NBPtr->MemRecNCmnGetSetFieldNb (NBPtr, 0, FieldName, 0);
-}
-
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets a bit field from PCI register
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   FieldName - Field name
- *     @param[in]   Field - Value to be stored in PCT register
- *
- */
-
-VOID
-MemRecNSetBitFieldNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       BIT_FIELD_NAME FieldName,
-  IN       UINT32 Field
-  )
-{
-  NBPtr->MemRecNCmnGetSetFieldNb (NBPtr, 1, FieldName, Field);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets a delay value a PCI register during training
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   TrnDly - type of delay to be set
- *     @param[in]   DrbnVar - encoding of Dimm-Rank-Byte-Nibble to be accessed
- *                  (use either DIMM_BYTE_ACCESS(dimm,byte) or CS_NBBL_ACCESS(cs,nibble) to use this encoding
- *
- *     @return      Value read
- */
-
-UINT32
-MemRecNGetTrainDlyNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar
-  )
-{
-  return NBPtr->MemRecNcmnGetSetTrainDlyNb (NBPtr, 0, TrnDly, DrbnVar, 0);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets a delay value a PCI register during training
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   TrnDly - type of delay to be set
- *     @param[in]   DrbnVar - encoding of Dimm-Rank-Byte-Nibble to be accessed
- *                  (use either DIMM_BYTE_ACCESS(dimm,byte) or CS_NBBL_ACCESS(cs,nibble) to use this encoding
- *     @param[in]   Field - Value to be programmed
- *
- */
-
-VOID
-MemRecNSetTrainDlyNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       TRN_DLY_TYPE TrnDly,
-  IN       DRBN DrbnVar,
-  IN       UINT16 Field
-  )
-{
-  NBPtr->MemRecNcmnGetSetTrainDlyNb (NBPtr, 1, TrnDly, DrbnVar, Field);
-}
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrndct.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrndct.c
deleted file mode 100644
index bbdd9a54d6..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrndct.c
+++ /dev/null
@@ -1,621 +0,0 @@
-/**
- * @file
- *
- * mrndct.c
- *
- * Northbridge common DCT support for Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem/NB)
- * @e \$Revision: 6781 $ @e \$Date: 2008-07-17 12:11:08 -0500 (Thu, 17 Jul 2008) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "OptionMemory.h"
-#include "PlatformMemoryConfiguration.h"
-#include "Ids.h"
-#include "cpuFamRegisters.h"
-#include "mm.h"
-#include "mn.h"
-#include "mt.h"
-#include "mru.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_MRNDCT_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-#define RECDEF_DRAM_CONTROL_REG   0x320C2A06
-#define RECDEF_DRAM_MRSREG        0x000400A4
-#define RECDEF_DRAM_TIMING_LO     0x000A0092
-#define RECDEF_DRAM_TIMING_HI     0xB6D218FF
-#define RECDEF_CSMASK_REG         0x00083FE0
-#define RECDEF_DRAM_CONFIG_LO_REG 0x00000000
-#define RECDEF_DRAM_CONFIG_HI_REG 0x1F48010B
-#define RECDEF_DRAM_BASE_REG      0x00000003
-
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-VOID
-STATIC
-MemRecTCtlOnDimmMirrorNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       BOOLEAN SetFlag
-  );
-
-VOID
-STATIC
-MemRecNSwapBitsNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  );
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function programs the memory controller with configuration parameters
- *
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- *     @return          TRUE - An Error value lower than AGESA_ERROR may have occurred
- *     @return          FALSE - An Error value greater than or equal to AGESA_ERROR may have occurred
- */
-
-BOOLEAN
-MemRecNAutoConfigNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  UINT8 Dimm;
-  UINT8 Dct;
-  UINT32 RegValue;
-  UINT8 ChipSel;
-  UINT32 CSBase;
-  DCT_STRUCT *DCTPtr;
-  CH_DEF_STRUCT *ChannelPtr;
-
-  Dct = NBPtr->Dct;
-  DCTPtr = NBPtr->DCTPtr;
-  ChannelPtr = NBPtr->ChannelPtr;
-
-  //Prepare variables for future usage.
-  for (Dimm = 0; Dimm < MAX_DIMMS_PER_CHANNEL; Dimm++) {
-    if ((ChannelPtr->ChDimmValid & (UINT8) 1 << Dimm) != 0) {
-      DCTPtr->Timings.CsPresent |= (UINT16) 1 << (Dimm * 2);
-      if (((ChannelPtr->DimmDrPresent & (UINT8) 1 << Dimm) == 0) && ((ChannelPtr->DimmQrPresent & (UINT8) 1 << Dimm) == 0)) {
-        continue;
-      } else {
-        DCTPtr->Timings.CsPresent |= (UINT16) 1 << (Dimm * 2 + 1);
-      }
-    }
-  }
-
-  Dimm = NBPtr->DimmToBeUsed;
-
-  //Temporarily set all CS Base/Limit registers (corresponding to Dimms exist on a channel) with 256MB size for WL training.
-  CSBase = 0;
-  for (ChipSel = 0; ChipSel < MAX_CS_PER_CHANNEL; ChipSel++) {
-    if (DCTPtr->Timings.CsPresent & (UINT8) 1 << ChipSel) {
-
-      CSBase &= (UINT32) ~0x08; //Clear OnDimmMirror bit.
-      if (((ChipSel & 1) != 0) && ((ChannelPtr->DimmMirrorPresent & (UINT8) 1 << (ChipSel >> 1)) != 0)) {
-        CSBase |= (UINT32) 0x08; //Set OnDimmMirror bit.
-      }
-      MemRecNSetBitFieldNb (NBPtr, (BFCSBaseAddr0Reg + ChipSel), (CSBase | 0x01));
-      CSBase += 0x100000;
-      if ((ChipSel & 1) == 0) {
-        MemRecNSetBitFieldNb (NBPtr, (BFCSMask0Reg + (ChipSel >> 1)), RECDEF_CSMASK_REG);
-      }
-    }
-  }
-  MemRecNSetBitFieldNb (NBPtr, BFDramBaseReg0, RECDEF_DRAM_BASE_REG);
-  MemRecNSetBitFieldNb (NBPtr, BFDramLimitReg0, 0x70000);
-
-  // Disable the other DCT
-  NBPtr->MemRecNSwitchDctNb (NBPtr, Dct ^ 0x01);
-  MemRecNSetBitFieldNb (NBPtr, BFDisDramInterface, 1);
-  NBPtr->MemRecNSwitchDctNb (NBPtr, Dct);
-  if (Dct != 0) {
-    // If DCT 1, set DctSelBase registers
-    MemRecNSetBitFieldNb (NBPtr, BFDctSelBaseAddrReg, 0x00000003);
-    MemRecNSetBitFieldNb (NBPtr, BFDctSelBaseOffsetReg, 0x00000000);
-  }
-
-  MemRecNSetBitFieldNb (NBPtr, BFDramBankAddrReg, 0x00001111);
-
-  // Set timing registers
-  MemRecNSetBitFieldNb (NBPtr, BFDramTimingLoReg, RECDEF_DRAM_TIMING_LO);
-  MemRecNSetBitFieldNb (NBPtr, BFDramTimingHiReg, RECDEF_DRAM_TIMING_HI);
-  MemRecNSetBitFieldNb (NBPtr, BFDramMRSReg, RECDEF_DRAM_MRSREG);
-  MemRecNSetBitFieldNb (NBPtr, BFDramControlReg, RECDEF_DRAM_CONTROL_REG);
-
-  // Set DRAM Config Low Register
-  RegValue = RECDEF_DRAM_CONFIG_LO_REG;
-  // Set x4Dimm based on DIMM type
-  if ((NBPtr->ChannelPtr->Dimmx4Present & ((UINT8) 1 << Dimm)) != 0) {
-    RegValue |= ((UINT32) 1 << (Dimm + 12));
-  }
-  // If not registered, set unbuffered DIMM
-  if (!(NBPtr->ChannelPtr->RegDimmPresent & ((UINT8) 1 << Dimm))) {
-    RegValue |= ((UINT32) 1 << 16);
-  }
-  MemRecNSetBitFieldNb (NBPtr, BFDramConfigLoReg, RegValue);
-
-  // Set DRAM Config High Register
-  RegValue = RECDEF_DRAM_CONFIG_HI_REG;
-  MemRecNSetBitFieldNb (NBPtr, BFDramConfigHiReg, RegValue);
-
-  //======================================================================
-  // Build Dram Config Misc Register Value
-  //======================================================================
-  //
-  if ((NBPtr->ChannelPtr->RegDimmPresent != 0) && (NBPtr->ChannelPtr->TechType == DDR3_TECHNOLOGY)) {
-    MemRecNSetBitFieldNb (NBPtr, BFSubMemclkRegDly, 1);
-  }
-  MemRecNSetBitFieldNb (NBPtr, BFOdtSwizzle, 1);
-
-  return TRUE;
-}
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function gets platform specific config/timing values from the interface layer and
- *   programs them into DCT.
- *
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- *     @return          TRUE - An Error value lower than AGESA_ERROR may have occurred
- *     @return          FALSE - An Error value greater than or equal to AGESA_ERROR may have occurred
- */
-
-BOOLEAN
-MemRecNPlatformSpecNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  UINT8 MaxDimmPerCH;
-  UINT32 AddrTmgValue;
-  UINT32 DrvStrValue;
-  UINT8 *DimmsPerChPtr;
-  CH_DEF_STRUCT *ChannelPtr;
-
-  ChannelPtr = NBPtr->ChannelPtr;
-  DimmsPerChPtr = MemRecFindPSOverrideEntry (NBPtr->RefPtr->PlatformMemoryConfiguration, PSO_MAX_DIMMS, 0, ChannelPtr->ChannelID);
-  if (DimmsPerChPtr != NULL) {
-    MaxDimmPerCH = *DimmsPerChPtr;
-  } else {
-    MaxDimmPerCH = 2;
-  }
-
-  if (ChannelPtr->RegDimmPresent) {
-    if (MaxDimmPerCH == 2) {
-      DrvStrValue = 0x20223222;
-      AddrTmgValue = 0;
-      if ((ChannelPtr->Dimms == 1) && (ChannelPtr->DimmQrPresent == 0)) {
-        DrvStrValue = 0x20113222;
-      }
-    } else if (MaxDimmPerCH == 3) {
-      DrvStrValue = 0x20223222;
-      AddrTmgValue = 0;
-      if ((ChannelPtr->Dimms == 1) && (ChannelPtr->DimmQrPresent == 0)) {
-        DrvStrValue = 0x20113222;
-      } else if (ChannelPtr->Dimms == 3) {
-        AddrTmgValue = 0x00380038;
-      }
-    } else {
-      DrvStrValue = 0x20223222;
-      AddrTmgValue = 0;
-      if (ChannelPtr->Dimms >= 3) {
-        AddrTmgValue = 0x002F0000;
-      } else if (ChannelPtr->Dimms == 1) {
-        DrvStrValue = 0x20113222;
-      }
-    }
-  } else {
-    if (ChannelPtr->Dimms == 2) {
-      DrvStrValue = 0x20223323;
-      AddrTmgValue = 0x00390039;
-    } else {
-      DrvStrValue = 0x20113222;
-      AddrTmgValue = 0;
-      if ((ChannelPtr->Dimms == 1) && (ChannelPtr->Loads >= 16)) {
-        AddrTmgValue = 0x003B0000;
-      }
-    }
-  }
-  MemRecNSetBitFieldNb (NBPtr, BFODCControl, DrvStrValue);
-  MemRecNSetBitFieldNb (NBPtr, BFAddrTmgControl, AddrTmgValue);
-  return TRUE;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function  reads MemClkFreqVal bit to see if the DIMMs are present in this node.
- *  If the DIMMs are present then set the DRAM Enable bit for this node.
- *
- *  Setting dram init starts up the DCT state machine, initializes the
- *  dram devices with MRS commands, and kicks off any
- *  HW memory clear process that the chip is capable of.  The sooner
- *  that dram init is set for all nodes, the faster the memory system
- *  initialization can complete.  Thus, the init loop is unrolled into
- *  two loops so as to start the processes for non BSP nodes sooner.
- *  This procedure will not wait for the process to finish.  Synchronization is
- *  handled elsewhere.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemRecNStartupDCTNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  // 1. Ensure F2x[1, 0]9C_x08[DisAutoComp] = 1.
-  // 2. BIOS waits 5 us for the disabling of the compensation engine to complete.
-  // ------- Done in InitPhyComp_Nb -------
-  //
-  MemRecNSetBitFieldNb (NBPtr, BFDisAutoComp, 1);
-  MemRecUWait10ns (500, NBPtr->MemPtr);
-
-  //MemRecNSetBitFieldNb (NBPtr, BFInitDram, 1);    // HW Dram init
-  AGESA_TESTPOINT (TpProcMemDramInit, &(NBPtr->MemPtr->StdHeader));
-  NBPtr->TechPtr->DramInit (NBPtr->TechPtr);
-
-  // 7. Program F2x[1, 0]9C_x08[DisAutoComp] = 0.
-  // 8. BIOS must wait 750 us for the phy compensation engine
-  //    to reinitialize.
-  //
-  MemRecNSetBitFieldNb (NBPtr, BFDisAutoComp, 0);
-  MemRecUWait10ns (75000, NBPtr->MemPtr);
-
-  while (MemRecNGetBitFieldNb (NBPtr, BFDramEnabled) == 0);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function  sets the maximum round-trip latency in the system from the processor to the DRAM
- *   devices and back.
-
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]     MaxRcvEnDly - Maximum receiver enable delay value
- *
- */
-
-VOID
-MemRecNSetMaxLatencyNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       UINT16 MaxRcvEnDly
-  )
-{
-  UINT16 SubTotal;
-
-  AGESA_TESTPOINT (TpProcMemRcvrCalcLatency, &(NBPtr->MemPtr->StdHeader));
-
-  // Multiply the CAS Latency by two to get a number of 1/2 MEMCLKs UINTs.
-  SubTotal = 6 * 2;
-
-  // If registered DIMMs are being used then add 1 MEMCLK to the sub-total.
-  if (MemRecNGetBitFieldNb (NBPtr, BFUnBuffDimm) == 0) {
-    SubTotal += 2;
-  }
-
-  // if (AddrCmdSetup || CsOdtSetup || CkeSetup) then K := K + 2;
-  SubTotal += 2;
-
-  // If the F2x[1, 0]78[RdPtrInit] field is 4, 5, 6 or 7 MEMCLKs,
-  // then add 4, 3, 2, or 1 MEMCLKs, respectively to the sub-total.
-  //
-  SubTotal += 8 - 5;
-
-  // Add the maximum (worst case) delay value of DqsRcvEnGrossDelay
-  // that exists across all DIMMs and byte lanes.
-  //
-  SubTotal += MaxRcvEnDly >> 5;
-
-  // Add 5.5 to the sub-total. 5.5 represents part of the processor
-  // specific constant delay value in the DRAM clock domain.
-  //
-  SubTotal += 5;             // add 5.5 1/2MemClk
-
-  // Convert the sub-total (in 1/2 MEMCLKs) to northbridge clocks (NCLKs)
-  // as follows (assuming DDR400 and assuming that no P-state or link speed
-  // changes have occurred).
-  //
-  //     Simplified formula:
-  //     SubTotal *= (Fn2xD4[NBFid]+4)/4
-  //
-  SubTotal = SubTotal * ((UINT16) MemRecNGetBitFieldNb (NBPtr, BFNbFid) + 4);
-  SubTotal /= 4;
-
-  // Add 5 NCLKs to the sub-total. 5 represents part of the processor
-  // specific constant value in the northbridge clock domain.
-  //
-  SubTotal += 5;
-
-  // Program the F2x[1, 0]78[MaxRdLatency] register with the total delay value
-  MemRecNSetBitFieldNb (NBPtr, BFMaxLatency, SubTotal);
-}
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   Set Dram ODT for mission mode and write leveling mode.
- *
- *     @param[in,out]   *NBPtr     - Pointer to the MEM_NB_BLOCK
- *     @param[in]       OdtMode    - Mission mode or write leveling mode
- *     @param[in]       ChipSelect - Chip select number
- *     @param[in]       TargetCS   - Chip select number that is being trained
- *
- */
-
-VOID
-MemRecNSetDramOdtNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       ODT_MODE OdtMode,
-  IN       UINT8 ChipSelect,
-  IN       UINT8 TargetCS
-  )
-{
-  UINT8 Dimms;
-  UINT8 DramTerm;
-  UINT8 DramTermDyn;
-  BOOLEAN IsDualRank;
-
-  Dimms = NBPtr->ChannelPtr->Dimms;
-  IsDualRank = (NBPtr->DCTPtr->Timings.CsPresent & (ChipSelect + 1)) ? TRUE : FALSE;
-
-  if (OdtMode == WRITE_LEVELING_MODE) {
-    DramTermDyn = 0;  // Disabled
-
-    if (ChipSelect & 1) {
-      DramTerm = 0;   // Disabled
-    } else if (Dimms == 1) {
-      DramTerm = 1;   // 60 Ohms
-    } else {
-      DramTerm = 3;   // 40 Ohms
-    }
-
-    if (ChipSelect == TargetCS) {
-      if (Dimms == 2) {
-        DramTerm = 2;   // 120 Ohms
-      } else if (IsDualRank) {
-        DramTerm = 0;   // Disabled
-      }
-
-      // Program WrLvOdt
-      MemRecNSetBitFieldNb (NBPtr, BFWrLvOdt, 0x0F);
-    } else if (ChipSelect == (TargetCS + 1)) {
-      if (Dimms == 1) {
-        DramTerm = 1;   // 60 Ohms
-      }
-    }
-  } else {
-    // Dram nominal termination
-    if (Dimms == 1) {
-      DramTerm = 1;   // 60 Ohms
-    } else {
-      DramTerm = 3;   // 40 Ohms
-    }
-
-    // Dram dynamic termination
-    if (Dimms < 2) {
-      DramTermDyn = 0;    // Disabled
-    } else {
-      DramTermDyn = 2;    // 120 Ohms
-    }
-  }
-  MemRecNSetBitFieldNb (NBPtr, BFDramTerm, DramTerm);
-  MemRecNSetBitFieldNb (NBPtr, BFDramTermDyn, DramTermDyn);
-}
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sends an MRS command
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemRecNSendMrsCmdNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  BOOLEAN ClearODM;
-  ClearODM = FALSE;
-  if (NBPtr->IsSupported[CheckClearOnDimmMirror]) {
-    ClearODM = FALSE;
-    if ((NBPtr->MCTPtr->LogicalCpuid.Revision & AMD_F10_C0) != 0) {
-      if (NBPtr->IsSupported[CheckClearOnDimmMirror]) {
-        if (MemRecNGetBitFieldNb (NBPtr, BFEnDramInit) == 0) {
-          // For C0, if EnDramInit bit is cleared, ODM needs to be cleared before sending MRS
-          MemRecTCtlOnDimmMirrorNb (NBPtr, FALSE);
-          ClearODM = TRUE;
-        }
-      }
-    }
-  }
-
-  MemRecNSwapBitsNb (NBPtr);
-
-  IDS_HDT_CONSOLE ("\t\t\tCS%d MR%d %04x\n",
-              (MemRecNGetBitFieldNb (NBPtr, BFDramInitRegReg) >> 20) & 0xF,
-              (MemRecNGetBitFieldNb (NBPtr, BFDramInitRegReg) >> 16) & 0xF,
-              (MemRecNGetBitFieldNb (NBPtr, BFDramInitRegReg) & 0xFFFF));
-
-  // 1.Set SendMrsCmd=1
-  MemRecNSetBitFieldNb (NBPtr, BFSendMrsCmd, 1);
-
-  // 2.Wait for SendMrsCmd=0
-  while (MemRecNGetBitFieldNb (NBPtr, BFSendMrsCmd)) {}
-
-  if (NBPtr->IsSupported[CheckClearOnDimmMirror]) {
-    if (ClearODM) {
-      // Restore ODM if necessary
-      MemRecTCtlOnDimmMirrorNb (NBPtr, TRUE);
-    }
-  }
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sends the ZQCL command
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemRecNSendZQCmdNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  // 1.Program MrsAddress[10]=1
-  MemRecNSetBitFieldNb (NBPtr, BFMrsAddress, (UINT32) 1 << 10);
-
-  // 2.Set SendZQCmd=1
-  MemRecNSetBitFieldNb (NBPtr, BFSendZQCmd, 1);
-
-  // 3.Wait for SendZQCmd=0
-  while (MemRecNGetBitFieldNb (NBPtr, BFSendZQCmd)) {}
-
-  // 4.Wait 512 MEMCLKs
-  MemRecUWait10ns (128, NBPtr->MemPtr);   // 512*2.5ns=1280, wait 1280ns
-}
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function disables/enables F2x[1, 0][5C:40][OnDimmMirror]
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in]   SetFlag   - Enable or disable flag - TRUE - Enable, FALSE - DISABLE
- *
- */
-
-VOID
-STATIC
-MemRecTCtlOnDimmMirrorNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr,
-  IN       BOOLEAN SetFlag
-  )
-{
-  UINT8 Chipsel;
-  UINT32 CSBaseAddrReg;
-
-  for (Chipsel = 0; Chipsel < MAX_CS_PER_CHANNEL; Chipsel += 2) {
-    CSBaseAddrReg = MemRecNGetBitFieldNb (NBPtr, BFCSBaseAddr1Reg + Chipsel);
-    if ((CSBaseAddrReg & 1) == 1) {
-      if (SetFlag && ((NBPtr->ChannelPtr->DimmMirrorPresent & ((UINT8) 1 << (Chipsel >> 1))) != 0)) {
-        CSBaseAddrReg |= ((UINT32) 1 << BFOnDimmMirror);
-      } else {
-        CSBaseAddrReg &= ~((UINT32) 1 << BFOnDimmMirror);
-      }
-      MemRecNSetBitFieldNb (NBPtr, BFCSBaseAddr1Reg + Chipsel, CSBaseAddrReg);
-    }
-  }
-}
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *
- *   This function swaps bits for OnDimmMirror support
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-STATIC
-MemRecNSwapBitsNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  UINT8 ChipSel;
-  UINT32 MRSReg;
-
-  ChipSel = (UINT8) MemRecNGetBitFieldNb (NBPtr, BFMrsChipSel);
-  if ((ChipSel & 1) != 0) {
-    MRSReg = MemRecNGetBitFieldNb (NBPtr, BFDramInitRegReg);
-    if ((NBPtr->ChannelPtr->DimmMirrorPresent & (UINT8) 1 << (ChipSel >> 1)) != 0) {
-      MRSReg = (MRSReg & 0xFFFCFE07) | ((MRSReg&0x100A8) << 1) | ((MRSReg&0x20150) >> 1);
-      MemRecNSetBitFieldNb (NBPtr, BFDramInitRegReg, MRSReg);
-    }
-  }
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrnmct.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrnmct.c
deleted file mode 100644
index 23044d5e0c..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrnmct.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/**
- * @file
- *
- * mrnmct.c
- *
- * Northbridge Common MCT supporting functions Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem/NB)
- * @e \$Revision: 6783 $ @e \$Date: 2008-07-17 13:07:51 -0500 (Thu, 17 Jul 2008) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "mrport.h"
-#include "mm.h"
-#include "mn.h"
-#include "mt.h"
-#include "cpuFamilyTranslation.h"
-#include "cpuCacheInit.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_MRNMCT_FILECODE
-
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function is the Recovery memory configuration function for Nb DDR3
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- *     @return          AGESA_STATUS
- *                          - AGESA_ALERT
- *                          - AGESA_FATAL
- *                          - AGESA_SUCCESS
- *                          - AGESA_WARNING
- */
-
-AGESA_STATUS
-MemRecNMemInitNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  AGESA_STATUS Status;
-  MEM_TECH_BLOCK *TechPtr;
-
-  TechPtr = NBPtr->TechPtr;
-
-  MemRecNInitializeMctNb (NBPtr);
-
-  if (NBPtr->IsSupported[DramModeBeforeDimmPres]) {
-    TechPtr->SetDramMode (TechPtr);
-  }
-
-  Status = AGESA_FATAL;
-  if (TechPtr->DimmPresence (TechPtr)) {
-
-    if (NBPtr->IsSupported[DramModeAfterDimmPres]) {
-      TechPtr->SetDramMode (TechPtr);
-    }
-
-    if (MemRecNAutoConfigNb (NBPtr)) {
-
-      AGESA_TESTPOINT (TpProcMemPlatformSpecificConfig, &(NBPtr->MemPtr->StdHeader));
-      if (MemRecNPlatformSpecNb (NBPtr)) {
-        AGESA_TESTPOINT (TpProcMemStartDcts, &(NBPtr->MemPtr->StdHeader));
-        MemRecNStartupDCTNb (NBPtr);
-
-        AGESA_TESTPOINT (TpProcMemMtrrConfiguration, &(NBPtr->MemPtr->StdHeader));
-        MemRecNCPUMemRecTypingNb (NBPtr);
-
-        AGESA_TESTPOINT (TpProcMemDramTraining, &(NBPtr->MemPtr->StdHeader));
-        NBPtr->TrainingFlow (NBPtr);
-
-        Status = AGESA_SUCCESS;
-      }
-    }
-  }
-
-  NBPtr->MemRecNFinalizeMctNb (NBPtr);
-
-  return Status;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets initial values in BUCFG and BUCFG2
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemRecNInitializeMctNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  MEM_DATA_STRUCT *MemPtr;
-  S_UINT64 SMsr;
-
-  MemPtr = NBPtr->MemPtr;
-
-  LibAmdMsrRead (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  if (SMsr.lo & ((UINT32) 1 << 15)) {
-    NBPtr->ClToNbFlag = TRUE;
-  }
-  SMsr.lo |= (UINT32) 1 << 15;                   // ClLinesToNbDis
-  LibAmdMsrWrite (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-
-  LibAmdMsrRead (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  SMsr.hi |= (UINT32) 1 << (48 - 32);              // WbEnhWsbDis
-  LibAmdMsrWrite (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-}
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function returns a physical address of a corresponding Chip select
- *
- *     @return      Addr -  System Address
- */
-
-UINT32
-MemRecNGetMCTSysAddrNb (
-  )
-{
-  UINT32 CSBase;
-
-  CSBase = (UINT32) 1 << 21;       // 1MB offset to avoid compat area from the base address.
-  if ((CSBase >= (MCT_TRNG_KEEPOUT_START << 8)) && (CSBase <= (MCT_TRNG_KEEPOUT_END << 8))) {
-    CSBase += (((MCT_TRNG_KEEPOUT_END << 8) - CSBase) + 0x0FFFFF) & 0xFFF00000;
-  }
-
-  return CSBase;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function runs on the BSP only, it sets the fixed MTRRs for common legacy ranges.
- *   It sets TOP_MEM and TOM2 and some variable MTRRs with WB Uncacheable type.
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemRecNCPUMemRecTypingNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  S_UINT64 SMsr;
-
-  MEM_DATA_STRUCT *MemPtr;
-  MemPtr = NBPtr->MemPtr;
-
-  //
-  //======================================================================
-  // Set default values for CPU registers
-  //======================================================================
-  //
-
-  LibAmdMsrRead (SYS_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  SMsr.lo |= 0x1C0000;                // turn on modification enable bit and
-                                      // mtrr enable bits
-  LibAmdMsrWrite (SYS_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-
-  SMsr.lo = SMsr.hi = 0x1E1E1E1E;
-  LibAmdMsrWrite (0x250, (UINT64 *)&SMsr, &MemPtr->StdHeader);      // 0 - 512K = WB Mem
-  LibAmdMsrWrite (0x258, (UINT64 *)&SMsr, &MemPtr->StdHeader);      // 512K - 640K = WB Mem
-
-  //
-  //======================================================================
-  // Set TOP_MEM and TOM2 CPU registers
-  //======================================================================
-  //
-  SMsr.hi = 0;
-  SMsr.lo = 0x08000000;
-  LibAmdMsrWrite (TOP_MEM, (UINT64 *)&SMsr, &MemPtr->StdHeader);  // TOP_MEM
-
-  // Set FS Base address for later memory accesses
-  SMsr.lo = 0;
-  LibAmdMsrWrite (FS_BASE, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-
-  //
-  //======================================================================
-  // Set variable MTRR values
-  //======================================================================
-  //
-  SMsr.lo = 0x00000006;
-  LibAmdMsrWrite (0x200, (UINT64 *)&SMsr, &MemPtr->StdHeader);      // MTRRPhysBase0
-
-  SMsr.hi = NBPtr->VarMtrrHiMsk;
-  SMsr.lo = 0xF8000800;
-  LibAmdMsrWrite (0x201, (UINT64 *)&SMsr, &MemPtr->StdHeader);      // MTRRPhysMask0
-
-}
-
-/*-----------------------------------------------------------------------------*/
-/**
- *
- *     This function returns the upper 32 bits mask for variable MTRR based on
- *     the CPU_LOGICAL_ID.
- *     @param[in]       *LogicalIdPtr - Pointer to the CPU_LOGICAL_ID
- *     @param[in]       StdHeader - Header for library and services
- *
- *     @return          UINT32 - MTRR mask for upper 32 bits
- *
- */
-UINT32
-MemRecGetVarMtrrHiMsk (
-  IN       CPU_LOGICAL_ID *LogicalIdPtr,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT8 TempNotCare;
-  CPU_SPECIFIC_SERVICES *FamilySpecificServices;
-  CACHE_INFO *CacheInfoPtr;
-
-  GetCpuServicesFromLogicalId (LogicalIdPtr, &FamilySpecificServices, StdHeader);
-  FamilySpecificServices->GetCacheInfo (FamilySpecificServices, &CacheInfoPtr, &TempNotCare, StdHeader);
-  return (UINT32) (CacheInfoPtr->VariableMtrrMask >> 32);
-}
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrntrain3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrntrain3.c
deleted file mode 100644
index 327a3f99ea..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrntrain3.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/**
- * @file
- *
- * mrntrain3.c
- *
- * Common Recovery Northbridge function for training flow for DDR3
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Mem/NB)
- * @e \$Revision: 7081 $ @e \$Date: 2008-07-31 01:47:27 -0500 (Thu, 31 Jul 2008) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "OptionMemory.h"
-#include "mm.h"
-#include "mn.h"
-#include "mt.h"
-#include "mrt3.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_NB_MRNTRAIN3_FILECODE
-/* features */
-
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function sets the training control flow
- *      The DDR3 mode bit must be set prior to calling this function
- *
- *      @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- */
-VOID
-MemNRecTrainingFlowNb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  MemRecTTrainDQSWriteHw3 (NBPtr->TechPtr);
-
-  MemRecTTrainRcvrEnSw (NBPtr->TechPtr);
-
-  MemRecTTrainDQSPosSw (NBPtr->TechPtr);
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrt3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrt3.c
deleted file mode 100644
index 02a9398c8b..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrt3.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/**
- * @file
- *
- * mrt3.c
- *
- * Common Technology  functions for DDR3  Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "mm.h"
-#include "mn.h"
-#include "mt.h"
-#include "mrt3.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_TECH_DDR3_MRT3_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function Constructs the technology block
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-MemRecConstructTechBlock3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  UINT8 Dct;
-  UINT8 Channel;
-  for (Dct = 0; Dct < NBPtr->MCTPtr->DctCount; Dct++) {
-    NBPtr->SwitchDCT (NBPtr, Dct);
-    for (Channel = 0; Channel < NBPtr->DCTPtr->ChannelCount; Channel++) {
-      NBPtr->SwitchChannel (NBPtr, Channel);
-      NBPtr->ChannelPtr->TechType = DDR3_TECHNOLOGY;
-    }
-  }
-
-  TechPtr->NBPtr = NBPtr;
-  TechPtr->RefPtr = NBPtr->RefPtr;
-
-  TechPtr->DramInit = MemRecTDramInitSw3;
-  TechPtr->SetDramMode = MemRecTSetDramMode3;
-  TechPtr->DimmPresence = MemRecTDIMMPresence3;
-}
-
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c
deleted file mode 100644
index 35d19c4e2d..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c
+++ /dev/null
@@ -1,239 +0,0 @@
-/**
- * @file
- *
- * mrtrci3.c
- *
- * Technology Control word initialization for DDR3 Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "OptionMemory.h"
-#include "Ids.h"
-#include "mm.h"
-#include "mn.h"
-#include "mru.h"
-#include "mt.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_TECH_DDR3_MRTRCI3_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-UINT8
-STATIC
-MemRecTGetCtlWord3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       UINT8 CtrlWordNum
-  );
-
-VOID
-STATIC
-MemRecTSendCtlWord3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       UINT8 CmdNum,
-  IN       UINT8 Value
-  );
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sends control words
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- *     @return  pDCT->Timings.TrwtTO updated
- */
-
-VOID
-MemRecTDramControlRegInit3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  UINT8 RCNum;
-  UINT8 Data;
-
-  MEM_DATA_STRUCT *MemPtr;
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-  MemPtr = NBPtr->MemPtr;
-
-  // wait 8us TACT must be changed to optimize to 8 MEM CLKs
-  // and wait 6us for PLL LOCK
-  MemRecUWait10ns (80 + 60, MemPtr);
-
-  // 2. Program F2x[1, 0]A8[CtrlWordCS]=bit mask for target chip selects.
-  NBPtr->SetBitField (NBPtr, BFCtrlWordCS, 3 << (NBPtr->DimmToBeUsed << 1));
-
-  for (RCNum = 0; RCNum <= 15; RCNum++) {
-    // wait 8us for TMRD, must be changed to optimize to 8 MEM CLKs
-    MemRecUWait10ns (80, MemPtr);
-
-    if ((RCNum != 6) && (RCNum != 7)) {
-      Data = MemRecTGetCtlWord3 (TechPtr, RCNum);
-      MemRecTSendCtlWord3 (TechPtr, RCNum, Data);
-    }
-  }
-
-  MemRecUWait10ns (60, MemPtr);   // wait 6us for TSTAB
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function calculates the ControlRC value
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *     @param[in]     CtrlWordNum  -  control Word number.
- *
- *     @return  Control Word value
- */
-
-UINT8
-STATIC
-MemRecTGetCtlWord3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       UINT8 CtrlWordNum
-  )
-{
-  UINT8  Data;
-
-  CH_DEF_STRUCT *ChannelPtr;
-
-  ChannelPtr = TechPtr->NBPtr->ChannelPtr;
-
-  Data = 0;  //Default value for all control words is 0
-  switch (CtrlWordNum) {
-  case 0:
-    Data = 0x02;  // DA4=1
-    break;
-  case 1:
-    Data = 0x0C;  // if single rank, set DBA1 and DBA0
-    break;
-  case 3:
-    Data = ChannelPtr->CtrlWrd03[TechPtr->NBPtr->DimmToBeUsed];
-    break;
-  case 4:
-    Data = ChannelPtr->CtrlWrd04[TechPtr->NBPtr->DimmToBeUsed];
-    break;
-  case 5:
-    Data = ChannelPtr->CtrlWrd05[TechPtr->NBPtr->DimmToBeUsed];
-    break;
-  case 9:
-    Data = 0x0D;
-    break;
-  default:;
-  }
-
-  return (Data&0x0F);
-}
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sends control word command
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *     @param[in]     CmdNum  -  control number.
- *     @param[in]     Value  -  value to send
- *
- */
-
-VOID
-STATIC
-MemRecTSendCtlWord3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       UINT8 CmdNum,
-  IN       UINT8 Value
-  )
-{
-  MEM_NB_BLOCK  *NBPtr;
-
-  ASSERT (CmdNum < 16);
-  ASSERT (Value < 16);
-
-  NBPtr = TechPtr->NBPtr;
-
-  // 1. Program MrsBank and MrsAddress.
-  //    n = [BA2, A2, A1, A0].
-  //    data = [BA1, BA0, A4, A3].
-  //    Set all other bits in MrsAddress to zero.
-  //
-  NBPtr->SetBitField (NBPtr, BFMrsBank, ((CmdNum&8) >> 1) | (Value >> 2));
-  NBPtr->SetBitField (NBPtr, BFMrsAddress, ((Value&3) << 3) | (CmdNum&7));
-  IDS_HDT_CONSOLE ("\t\tCS%d RC%02d %04x\n",
-              (NBPtr->GetBitField (NBPtr, BFDramInitRegReg) >> 20) & 0xF,
-              ((NBPtr->GetBitField (NBPtr, BFDramInitRegReg) >> 15) & 8) |
-              (NBPtr->GetBitField (NBPtr, BFDramInitRegReg) & 7),
-              ((NBPtr->GetBitField (NBPtr, BFDramInitRegReg) >> 14) & 0xC) |
-              ((NBPtr->GetBitField (NBPtr, BFDramInitRegReg) >> 3) & 3));
-
-  // 2.Set SendCtrlWord=1
-  NBPtr->SetBitField (NBPtr, BFSendCtrlWord, 1);
-  // 3.Wait for BFSendCtrlWord=0
-  while (NBPtr->GetBitField (NBPtr, BFSendCtrlWord) != 0) {}
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c
deleted file mode 100644
index 694103a9f9..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c
+++ /dev/null
@@ -1,348 +0,0 @@
-/**
- * @file
- *
- * mrtsdi3.c
- *
- * Technology Software DRAM Init for DDR3 Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "OptionMemory.h"
-#include "mm.h"
-#include "mn.h"
-#include "mru.h"
-#include "mt.h"
-#include "mrt3.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_TECH_DDR3_MRTSDI3_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function initiates software DRAM init
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-MemRecTDramInitSw3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  UINT8 ChipSel;
-  MEM_DATA_STRUCT *MemPtr;
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-  MemPtr = NBPtr->MemPtr;
-
-  // 3.Program F2x[1,0]7C[EnDramInit]=1
-  NBPtr->SetBitField (NBPtr, BFEnDramInit, 1);
-
-  // 4.wait 200us
-  MemRecUWait10ns (20000, MemPtr);
-
-  NBPtr->SetBitField (NBPtr, BFDeassertMemRstX, 1);
-
-  // 6.wait 500us
-  MemRecUWait10ns (50000, MemPtr);
-
-  // 7.NOP or deselect & take CKE high
-  NBPtr->SetBitField (NBPtr, BFAssertCke, 1);
-
-  // 8.wait 360ns
-  MemRecUWait10ns (36, MemPtr);
-
-  // The following steps are performed with registered DIMMs only and
-  // must be done for each chip select pair:
-  //
-  if (NBPtr->ChannelPtr->RegDimmPresent != 0) {
-    MemRecTDramControlRegInit3 (TechPtr);
-  }
-
-  //
-  // In recovery mode, we only need to initialize one chipsel for UDIMMs.
-  //
-  NBPtr->SetDramOdtRec (NBPtr, MISSION_MODE, 0, 0);
-
-  for (ChipSel = 0; ChipSel < MAX_CS_PER_CHANNEL; ChipSel++) {
-    if ((NBPtr->DCTPtr->Timings.CsPresent & (UINT16) 1 << ChipSel) != 0) {
-      NBPtr->SetBitField (NBPtr, BFMrsChipSel, ChipSel);
-      // 13.Send EMRS(2)
-      MemRecTEMRS23 (TechPtr);
-      NBPtr->SendMrsCmd (NBPtr);
-
-      // 14.Send EMRS(3). Ordinarily at this time, MrsAddress[2:0]=000b
-      MemRecTEMRS33 (TechPtr);
-      NBPtr->SendMrsCmd (NBPtr);
-
-      // 15.Send EMRS(1).
-      MemRecTEMRS13 (TechPtr);
-      NBPtr->SendMrsCmd (NBPtr);
-
-      // 16.Send MRS with MrsAddress[8]=1(reset the DLL)
-      MemRecTMRS3 (TechPtr);
-      NBPtr->SendMrsCmd (NBPtr);
-
-      //wait 500us
-      MemRecUWait10ns (50000, MemPtr);
-
-      if (NBPtr->ChannelPtr->RegDimmPresent == 0) {
-        break;
-      }
-    }
-  }
-
-  // 17.Send two ZQCL commands (to even then odd chip select)
-  NBPtr->sendZQCmd (NBPtr);
-  NBPtr->sendZQCmd (NBPtr);
-
-  // 18.Program F2x[1,0]7C[EnDramInit]=0
-  NBPtr->SetBitField (NBPtr, BFEnDramInit, 0);
-
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function calculates the EMRS1 value
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-MemRecTEMRS13 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  UINT16 MrsAddress;
-  UINT8 DramTerm;
-
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-
-  // BA2=0,BA1=0,BA0=1
-  NBPtr->SetBitField (NBPtr, BFMrsBank, 1);
-
-  MrsAddress = 0;
-
-  // program MrsAddress[5,1]=output driver impedance control (DIC):
-  // based on F2x[1,0]84[DrvImpCtrl], which is 2'b01
-  MrsAddress |= ((UINT16) 1 << 1);
-
-  // program MrsAddress[9,6,2]=nominal termination resistance of ODT (RTT):
-  // based on F2x[1,0]84[DramTerm], which is 3'b001 (60 Ohms)
-  DramTerm = (UINT8) NBPtr->GetBitField (NBPtr, BFDramTerm);
-  if ((DramTerm & 1) != 0) {
-    MrsAddress |= ((UINT16) 1 << 2);
-  }
-  if ((DramTerm & 2) != 0) {
-    MrsAddress |= ((UINT16) 1 << 6);
-  }
-  if ((DramTerm & 4) != 0) {
-    MrsAddress |= ((UINT16) 1 << 9);
-  }
-
-  // program MrsAddress[12]=output disable (QOFF):
-  // based on F2x[1,0]84[Qoff], which is 1'b0
-
-  // program MrsAddress[11]=TDQS:
-  // based on F2x[1,0]94[RDqsEn], which is 1'b0
-
-  NBPtr->SetBitField (NBPtr, BFMrsAddress, MrsAddress);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function calculates the EMRS2 value
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-MemRecTEMRS23 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  UINT16 MrsAddress;
-  UINT8 DramTermDyn;
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-
-  // BA2=0,BA1=1,BA0=0
-  NBPtr->SetBitField (NBPtr, BFMrsBank, 2);
-
-  // program MrsAddress[5:3]=CAS write latency (CWL):
-  // based on F2x[1,0]84[Tcwl], which is 3'b000
-  //
-  MrsAddress = 0;
-
-  // program MrsAddress[6]=auto self refresh method (ASR):
-  // based on F2x[1,0]84[ASR], which is 1'b1
-  // program MrsAddress[7]=self refresh temperature range (SRT):
-  // based on F2x[1,0]84[SRT], which is also 1'b0
-  //
-  MrsAddress |= (UINT16) 1 << 6;
-
-  // program MrsAddress[10:9]=dynamic termination during writes (RTT_WR):
-  // based on F2x[1,0]84[DramTermDyn]
-  //
-  DramTermDyn = (UINT8) NBPtr->GetBitField (NBPtr, BFDramTermDyn);
-  MrsAddress |= (UINT16) DramTermDyn << 9;
-
-  NBPtr->SetBitField (NBPtr, BFMrsAddress, MrsAddress);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function calculates the EMRS3 value
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-MemRecTEMRS33 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-
-  // BA2=0,BA1=1,BA0=1
-  NBPtr->SetBitField (NBPtr, BFMrsBank, 3);
-
-  // program MrsAddress[1:0]=multi purpose register address location
-  // (MPR Location):based on F2x[1,0]84[MprLoc], which is 0
-  // program MrsAddress[2]=multi purpose register
-  // (MPR):based on F2x[1,0]84[MprEn], which is also 0
-  //
-  NBPtr->SetBitField (NBPtr, BFMrsAddress, 0);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This sets MSS value
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-MemRecTMRS3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  UINT16 MrsAddress;
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-
-  // BA2=0,BA1=0,BA0=0
-  NBPtr->SetBitField (NBPtr, BFMrsBank, 0);
-
-  // program MrsAddress[1:0]=burst length and control method
-  // (BL):based on F2x[1,0]84[BurstCtrl], which is 1'b0
-  //
-  MrsAddress = 0;
-
-  // program MrsAddress[3]=1 (BT):interleaved
-  MrsAddress |= (UINT16) 1 << 3;
-
-  // program MrsAddress[6:4,2]=read CAS latency
-  // (CL):based on F2x[1,0]88[Tcl], which is 4'b0010
-  MrsAddress |= (UINT16) 2 << 4;
-
-  // program MrsAddress[11:9]=write recovery for auto-precharge
-  // (WR):based on F2x[1,0]84[Twr], which is 3'b010
-  //
-  MrsAddress |= (UINT16) 2 << 9;
-
-  // program MrsAddress[12]=0 (PPD):slow exit
-
-  // program MrsAddress[8]=1 (DLL):DLL reset
-  MrsAddress |= (UINT16) 1 << 8;   // just issue DLL reset at first time
-
-  NBPtr->SetBitField (NBPtr, BFMrsAddress, MrsAddress);
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c
deleted file mode 100644
index de458fe9f8..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c
+++ /dev/null
@@ -1,269 +0,0 @@
-/**
- * @file
- *
- * mrtspd3.c
- *
- * Technology SPD supporting functions for DDR3 Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "mm.h"
-#include "mn.h"
-#include "mt.h"
-#include "mrtspd3.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_TECH_DDR3_MRTSPD3_FILECODE
-
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-#define _UNDEF_ 0xFF
-#define MAX_DIES_PER_SOCKET     2   ///< Set to largest of any CPU
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function sets the DRAM mode
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- *     @return  TRUE - indicates that the DRAM mode is set to DDR2
- */
-
-BOOLEAN
-MemRecTSetDramMode3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  TechPtr->NBPtr->SetBitField (TechPtr->NBPtr, BFLegacyBiosMode, 0);
-  TechPtr->NBPtr->SetBitField (TechPtr->NBPtr, BFDdr3Mode, 1);
-  return TRUE;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *   This function determines if DIMMs are present. It checks checksum and interrogates the SPDs
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- *     @return  TRUE - indicates that a FATAL error has not occurred
- *     @return  FALL - indicates that a FATAL error has not occurred
- */
-
-BOOLEAN
-MemRecTDIMMPresence3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  UINT8 Node;
-  UINT8 Dct;
-  UINT8 Channel;
-  UINT8 i;
-  SPD_DEF_STRUCT *SPDPtr;
-  UINT8 *SpdBufferPtr;
-  DIE_STRUCT *MCTPtr;
-  DCT_STRUCT *DCTPtr;
-  CH_DEF_STRUCT *ChannelPtr;
-  MEM_NB_BLOCK *NBPtr;
-  UINT16 MaxDimms;
-  UINT16 Value16;
-  UINT8 Devwidth;
-  UINT8 Value8;
-  UINT16 DimmMask;
-
-  NBPtr = TechPtr->NBPtr;
-  MCTPtr = NBPtr->MCTPtr;
-
-  NBPtr->DimmToBeUsed = _UNDEF_;
-  for (Node = 0; Node < MAX_DIES_PER_SOCKET; Node++) {
-    NBPtr->SwitchNodeRec (NBPtr, Node);
-    for (Dct = 0; Dct < NBPtr->MCTPtr->DctCount; Dct++) {
-      NBPtr->SwitchDCT (NBPtr, Dct);
-      DCTPtr = NBPtr->DCTPtr;
-      for (Channel = 0; Channel < DCTPtr->ChannelCount; Channel++) {
-        NBPtr->SwitchChannel (NBPtr, Channel);
-        ChannelPtr = NBPtr->ChannelPtr;
-        SPDPtr = NBPtr->SPDPtr;
-
-        // Get the maximum number of DIMMs
-        MaxDimms = MAX_DIMMS_PER_CHANNEL;
-        for (i = 0; i < MaxDimms; i++) {
-          //  Bitmask representing dimm #i.
-          DimmMask = (UINT16) 1 << i;
-
-          if (SPDPtr[i].DimmPresent) {
-            SpdBufferPtr = (UINT8 *)&(SPDPtr[i].Data);
-
-            MCTPtr->DimmPresent |= DimmMask;
-            if (SpdBufferPtr[SPD_TYPE] == JED_DDR3SDRAM) {
-              ChannelPtr->ChDimmValid |= DimmMask;
-              if (NBPtr->DimmToBeUsed == _UNDEF_) {
-                NBPtr->DimmToBeUsed = i;
-              }
-            }
-
-            //  Check module type information.
-            if (SpdBufferPtr[SPD_DIMM_TYPE] == JED_RDIMM || SpdBufferPtr[SPD_DIMM_TYPE] == JED_MINIRDIMM) {
-              ChannelPtr->RegDimmPresent |= DimmMask;
-            }
-
-            if (SpdBufferPtr[SPD_DIMM_TYPE] == JED_SODIMM) {
-              ChannelPtr->SODimmPresent |= DimmMask;
-            }
-
-            //  Get the Dimm width data
-            Devwidth = SpdBufferPtr[SPD_DEV_WIDTH] & 0x7;
-            switch (Devwidth) {
-            case 0:
-              ChannelPtr->Dimmx4Present |= DimmMask;
-              Devwidth = 4;
-              break;
-            case 1:
-              ChannelPtr->Dimmx8Present |= DimmMask;
-              Devwidth = 8;
-              break;
-            case 2:
-              ChannelPtr->Dimmx16Present |= DimmMask;
-              Devwidth = 16;
-              break;
-            default:
-              IDS_ERROR_TRAP;
-            }
-
-            //  Determine the page size.
-            //       page_size = 2^COLBITS * Devwidth/8
-            //
-            Value16 = (((UINT16) 1 << (SpdBufferPtr[SPD_COL_SZ]&7)) * Devwidth) / 8;
-            if ((Value16 >> 11) == 0) {
-              DCTPtr->Timings.DIMM1KPage |= DimmMask;
-            }
-
-            //  Calculate bus loading per Channel
-            if (Devwidth == 16) {
-              Devwidth = 4;
-            } else if (Devwidth == 4) {
-              Devwidth = 16;
-            }
-
-            //  specify the number of ranks
-            Value8 = ((SpdBufferPtr[SPD_RANKS] >> 3) & 0x07) + 1;
-            if (Value8 > 2) {
-              ChannelPtr->DimmQrPresent |= DimmMask;
-              Devwidth = Devwidth << 2;
-            } else if (Value8 == 2) {
-              ChannelPtr->DimmDrPresent |= DimmMask;   //  Dual rank dimms
-              Devwidth = Devwidth << 1;
-            }
-
-            ChannelPtr->Ranks = ChannelPtr->Ranks + Value8;
-            ChannelPtr->Loads = ChannelPtr->Loads + Devwidth;
-            ChannelPtr->Dimms++;
-
-            // Check address mirror support for Unbuffered Dimms only
-            if ((ChannelPtr->RegDimmPresent & DimmMask) == 0) {
-              if ((SpdBufferPtr[SPD_ADDRMAP] & 1) != 0) {
-                ChannelPtr->DimmMirrorPresent |= DimmMask;
-              }
-            }
-
-            // Get control word values for RC3, RC4 and RC5
-            ChannelPtr->CtrlWrd03[i] = SpdBufferPtr[SPD_CTLWRD03] >> 4;
-            ChannelPtr->CtrlWrd04[i] = SpdBufferPtr[SPD_CTLWRD04] & 0x0F;
-            ChannelPtr->CtrlWrd05[i] = SpdBufferPtr[SPD_CTLWRD05] >> 4;
-          } // if DIMM present
-        } // Dimm loop
-
-        if (ChannelPtr->ChDimmValid != 0) {
-          // exit loops
-          Channel = DCTPtr->ChannelCount;
-          Dct = NBPtr->MCTPtr->DctCount;
-          Node = MAX_DIES_PER_SOCKET;
-        }
-      } // Channel loop
-    } // DCT loop
-  }
-
-  //  If we have DIMMs, some further general characteristics checking
-  if (NBPtr->DimmToBeUsed == _UNDEF_) {
-    //  Leave with an error - no dimms on this DCT
-    // LibAmdEventLog (AGESA_FATAL, MEM_ERROR_NO_DIMM_FOUND, 0, NBPtr->Dct, NBPtr->Channel, 0);   //@attention commented out since it is not defined in recovery code
-    SetMemRecError (AGESA_FATAL, MCTPtr);
-  }
-
-  return (BOOLEAN) (MCTPtr->ErrCode < AGESA_FATAL);
-}
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h
deleted file mode 100644
index d85b6b7a8b..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h
+++ /dev/null
@@ -1,129 +0,0 @@
-/**
- * @file
- *
- * mrtspd3.h
- *
- * Technology SPD support for DDR3 Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-  *
-  * Copyright (c) 2011, Advanced Micro Devices, Inc.
-  * All rights reserved.
-  *
-  * Redistribution and use in source and binary forms, with or without
-  * modification, are permitted provided that the following conditions are met:
-  *     * Redistributions of source code must retain the above copyright
-  *       notice, this list of conditions and the following disclaimer.
-  *     * Redistributions in binary form must reproduce the above copyright
-  *       notice, this list of conditions and the following disclaimer in the
-  *       documentation and/or other materials provided with the distribution.
-  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-  *       its contributors may be used to endorse or promote products derived
-  *       from this software without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  * ***************************************************************************
-  *
- */
-
-#ifndef _MTSPD3_H_
-#define _MTSPD3_H_
-
-/*----------------------------------------------------------------------------
- *   Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
- *
- *----------------------------------------------------------------------------
- */
-
-/*-----------------------------------------------------------------------------
- *                         DEFINITIONS AND MACROS
- *
- *-----------------------------------------------------------------------------
- */
-
-/*===============================================================================
- *   Jedec DDR III
- *===============================================================================
- */
-#define SPD_BYTE_USED     0
-#define SPD_TYPE          2              /* SPD byte read location */
-#define JED_DDR_SDRAM     7              /* Jedec defined bit field */
-#define JED_DDR2_SDRAM    8              /* Jedec defined bit field */
-#define JED_DDR3SDRAM   0xB              /* Jedec defined bit field */
-
-#define SPD_DIMM_TYPE    3
-#define SPD_ATTRIB      21
-#define JED_DIF_CK_MSK    0x20            /* Differential Clock Input */
-#define JED_RDIMM       1
-#define JED_MINIRDIMM   5
-#define JED_UDIMM       2
-#define JED_SODIMM       3
-
-#define SPD_L_BANKS      4               /* [7:4] number of [logical] banks on each device */
-#define SPD_DENSITY     4               /* bit 3:0 */
-#define SPD_ROW_SZ       5               /* bit 5:3 */
-#define SPD_COL_SZ       5               /* bit 2:0 */
-#define SPD_RANKS       7               /* bit 5:3 */
-#define SPD_DEV_WIDTH    7               /* bit 2:0 */
-#define SPD_ECCBITS     8               /* bit 4:3 */
-#define JED_ECC         8
-#define SPD_RAWCARD     62              /* bit 2:0 */
-#define SPD_ADDRMAP     63              /* bit 0 */
-
-#define SPD_CTLWRD03     70              /* bit 7:4 */
-#define SPD_CTLWRD04     71              /* bit 3:0 */
-#define SPD_CTLWRD05     71              /* bit 7:4 */
-
-#define SPD_DIVIDENT    10
-#define SPD_DIVISOR     11
-
-#define SPD_TCK         12
-#define SPD_CASLO       14
-#define SPD_CASHI       15
-#define SPD_TAA         16
-
-#define SPD_TRP         20
-#define SPD_TRRD        19
-#define SPD_TRCD        18
-#define SPD_TRAS        22
-#define SPD_TWR         17
-#define SPD_TWTR        26
-#define SPD_TRTP        27
-#define SPD_TRC         23
-#define SPD_UPPER_TRC   21              /* bit 7:4 */
-#define SPD_UPPER_TRAS  21              /* bit 3:0 */
-#define SPD_TFAW        29
-#define SPD_UPPER_TFAW  28              /* bit 3:0 */
-
-/*----------------------------------------------------------------------------
- *                         TYPEDEFS, STRUCTURES, ENUMS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           FUNCTIONS PROTOTYPE
- *
- *----------------------------------------------------------------------------
- */
-
-
-#endif  /* _MTSPD3_H_ */
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c
deleted file mode 100644
index c3c4065076..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c
+++ /dev/null
@@ -1,340 +0,0 @@
-/**
- * @file
- *
- * mrttwl3.c
- *
- * Technology Phy assisted write levelization for recovery DDR3
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 5674 $ @e \$Date: 2008-04-04 13:22:37 -0500 (Fri, 04 Apr 2008) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "OptionMemory.h"
-#include "PlatformMemoryConfiguration.h"
-#include "Ids.h"
-#include "mm.h"
-#include "mn.h"
-#include "mru.h"
-#include "mt.h"
-#include "mrt3.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_TECH_DDR3_MRTTWL3_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-#define MAX_BYTELANES 8             /* Max Bytelanes per channel */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-VOID
-STATIC
-MemRecTPrepareDIMMs3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       BOOLEAN Wl
-  );
-
-VOID
-STATIC
-MemRecTProcConfig3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-VOID
-STATIC
-MemRecTBeginWLTrain3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function executed hardware based write levelization for a specific die
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-MemRecTTrainDQSWriteHw3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-
-  //  Disable auto refresh by configuring F2x[1, 0]8C[DisAutoRefresh] = 1.
-  NBPtr->SetBitField (NBPtr, BFDisAutoRefresh, 1);
-  //  Disable ZQ calibration short command by configuring F2x[1, 0]94[ZqcsInterval] = 00b.
-  NBPtr->SetBitField (NBPtr, BFZqcsInterval, 0);
-
-  // 1. Specify the target Dimm that is to be trained by programming
-  //     F2x[1, 0]9C_x08[TrDimmSel].
-  NBPtr->SetBitField (NBPtr, BFTrDimmSel, NBPtr->DimmToBeUsed);
-
-  // 2. Prepare the DIMMs for write levelization using DDR3-defined
-  // MR commands.
-  MemRecTPrepareDIMMs3 (TechPtr, TRUE);
-
-  // 3. After the DIMMs are configured, BIOS waits 40 MEMCLKs to
-  //     satisfy DDR3-defined internal DRAM timing.
-  MemRecUWait10ns (10, NBPtr->MemPtr);
-
-  // 4. Configure the processor's DDR phy for write levelization training:
-  MemRecTProcConfig3 (TechPtr);
-
-  // 5. Begin write levelization training
-  MemRecTBeginWLTrain3 (TechPtr);
-
-  // 6. Configure DRAM Phy Control Register so that the phy stops driving write levelization ODT.
-  // Program WrLvOdtEn=0
-  NBPtr->SetBitField (NBPtr, BFWrLvOdtEn, 0);
-
-  // Wait 10 MEMCLKs to allow for ODT signal settling.
-  MemRecUWait10ns (3, NBPtr->MemPtr);
-
-  // 7. Program the target Dimm back to normal operation
-  MemRecTPrepareDIMMs3 (TechPtr, FALSE);
-
-  //  13.Program F2x[1, 0]8C[DisAutoRefresh] = 0.
-  NBPtr->SetBitField (NBPtr, BFDisAutoRefresh, 0);
-  //  14.Program F2x[1, 0]94[ZqcsInterval] to the proper interval for the current memory configuration.
-  NBPtr->SetBitField (NBPtr, BFZqcsInterval, 2);
-
-}
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function prepares the DIMMS for Write Levelization
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *     @param[in] Wl - Indicates if WL mode should be enabled
- *
- */
-
-VOID
-STATIC
-MemRecTPrepareDIMMs3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       BOOLEAN Wl
-  )
-{
-  UINT8 ChipSel;
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-
-  AGESA_TESTPOINT (TpProcMemWlPrepDimms, &(NBPtr->MemPtr->StdHeader));
-
-  for (ChipSel = 0; ChipSel < MAX_CS_PER_CHANNEL; ChipSel++) {
-    // Set Dram ODT based on current mode.
-    if ((NBPtr->DCTPtr->Timings.CsPresent & (UINT16) 1 << ChipSel) != 0) {
-      if (Wl) {
-        NBPtr->SetDramOdtRec (NBPtr, WRITE_LEVELING_MODE, ChipSel, (NBPtr->DimmToBeUsed << 1));
-      } else {
-        NBPtr->SetDramOdtRec (NBPtr, MISSION_MODE, 0, 0);
-      }
-
-      NBPtr->SetBitField (NBPtr, BFMrsChipSel, ChipSel);
-
-      // Set MR1 to F2x7C[MrsAddress], F2x7C[MrsBank]=1
-      MemRecTEMRS13 (TechPtr);
-      // Program Level
-      if (Wl) {
-        if ((ChipSel >> 1) == NBPtr->DimmToBeUsed) {
-          NBPtr->SetBitField (NBPtr, BFLevel, 1);
-          if (ChipSel & 1) {
-            // Output buffer disabled
-            NBPtr->SetBitField (NBPtr, BFMrsQoff, 1);
-          }
-        }
-      }
-      // Send command
-      NBPtr->SendMrsCmd (NBPtr);
-
-      // Set MR2 to F2x7C[MrsAddress], F2x7C[MrsBank]=1
-      MemRecTEMRS23 (TechPtr);
-      // Send command
-      NBPtr->SendMrsCmd (NBPtr);
-    }
-  }
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function configures the DIMMS for Write Levelization
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-STATIC
-MemRecTProcConfig3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  MEM_NB_BLOCK *NBPtr;
-  CH_DEF_STRUCT *ChannelPtr;
-  UINT8 ByteLane;
-  UINT8 *Seed;
-  UINT8 DefaultSeed;
-  UINT8 CurrentSeed;
-  UINT8 Dimm;
-
-  NBPtr = TechPtr->NBPtr;
-  ChannelPtr = TechPtr->NBPtr->ChannelPtr;
-
-  Dimm = NBPtr->DimmToBeUsed;
-
-  // Program WrLvOdtEn=1
-  NBPtr->SetBitField (NBPtr, BFWrLvOdtEn, 1);
-
-  // Wait 10 MEMCLKs to allow for ODT signal settling.
-  MemRecUWait10ns (3, NBPtr->MemPtr);
-
-  //  Program an initialization Value to registers F2x[1, 0]9C_x[51:50] and F2x[1, 0]9C_x52 to set
-  //  the gross and fine delay for all the byte lane fields. If the target frequency is different than 400MHz,
-  //  BIOS must execute two training passes for each Dimm. For pass 1 at a 400MHz MEMCLK frequency,
-  //  use an initial total delay Value of 01Fh. This represents a 1UI (UI=.5MEMCLK) delay and is determined
-  //  by design.
-
-  //  Get default seed
-  DefaultSeed = 0x1A;
-  if (NBPtr->ChannelPtr->RegDimmPresent != 0) {
-    DefaultSeed = 0x41;
-  }
-
-  //  Get platform override seed
-  Seed = (UINT8 *) MemRecFindPSOverrideEntry (NBPtr->RefPtr->PlatformMemoryConfiguration, PSO_WL_SEED, NBPtr->MCTPtr->SocketId, ChannelPtr->ChannelID);
-
-  for (ByteLane = 0; ByteLane < 8; ByteLane++) {
-    // This includes ECC as byte 8
-    CurrentSeed = ((Seed != NULL) ? Seed[ByteLane] : DefaultSeed);
-    NBPtr->SetTrainDly (NBPtr, AccessPhRecDly, DIMM_BYTE_ACCESS (Dimm, ByteLane), CurrentSeed);
-    ChannelPtr->WrDqsDlys[Dimm * MAX_BYTELANES + ByteLane] = CurrentSeed;
-  }
-
-  // Program F2x[1, 0]9C_x08[WrtLvTrMode]=0 for phy assisted training.
-
-  // Program F2x[1, 0]9C_x08[TrNibbleSel]=0
-
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function begins WL training for a specific DIMM
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-STATIC
-MemRecTBeginWLTrain3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  MEM_NB_BLOCK *NBPtr;
-  UINT8 ByteLane;
-  UINT8 Seed;
-  UINT8 Delay;
-  UINT8 Dimm;
-
-  NBPtr = TechPtr->NBPtr;
-
-  Dimm = NBPtr->DimmToBeUsed;
-  // Program F2x[1, 0]9C_x08[WrtLlTrEn]=1.
-  NBPtr->SetBitField (NBPtr, BFWrtLvTrEn, 1);
-
-  //  Wait 200 MEMCLKs. If executing pass 2, wait 32 MEMCLKs.
-  MemRecUWait10ns (50, NBPtr->MemPtr);
-
-  //  Program F2x[1, 0]9C_x08[WrtLlTrEn]=0.
-  NBPtr->SetBitField (NBPtr, BFWrtLvTrEn, 0);
-
-  //  Read from registers F2x[1, 0]9C_x[51:50] and F2x[1, 0]9C_x52 to get the gross and fine Delay settings
-  //   for the target Dimm and save these values.
-  for (ByteLane = 0; ByteLane < 8; ByteLane++) {
-    // This includes ECC as byte 8
-    Seed = NBPtr->ChannelPtr->WrDqsDlys[(Dimm * MAX_BYTELANES) + ByteLane];
-    Delay = (UINT8)NBPtr->GetTrainDly (NBPtr, AccessPhRecDly, DIMM_BYTE_ACCESS (Dimm, ByteLane));
-    if (((Seed >> 5) == 0) && ((Delay >> 5) == 3)) {
-      // If seed has gross delay of 0 and PRE has gross delay of 3,
-      // then round the total delay of TxDqs to 0.
-      Delay = 0;
-    }
-    NBPtr->SetTrainDly (NBPtr, AccessWrDqsDly, DIMM_BYTE_ACCESS (Dimm, ByteLane), Delay);
-    NBPtr->ChannelPtr->WrDqsDlys[(Dimm * MAX_BYTELANES) + ByteLane] = Delay;
-  }
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttpos.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttpos.c
deleted file mode 100644
index fda9a54da1..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttpos.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/**
- * @file
- *
- * mttpos.c
- *
- * Technology DQS R/W position training. Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-
-#include "AGESA.h"
-#include "amdlib.h"
-#include "mm.h"
-#include "mn.h"
-#include "mt.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_TECH_MRTTPOS_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function hard-codes DQS position delays for all bytes
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-MemRecTTrainDQSPosSw (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  //Hard Code Settings
-  MemRecTSetWrDatRdDqs (TechPtr, 0x0F);
-}
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttsrc.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttsrc.c
deleted file mode 100644
index 536e28facf..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttsrc.c
+++ /dev/null
@@ -1,499 +0,0 @@
-/**
- * @file
- *
- * mrttsrc.c
- *
- * Technology Software based DQS receiver enable training Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-#include "AGESA.h"
-#include "OptionMemory.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "mrport.h"
-#include "mm.h"
-#include "mn.h"
-#include "mru.h"
-#include "mt.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_TECH_MRTTSRC_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-#define MAX_BYTELANES 8             /* Max Bytelanes per channel */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-
-VOID
-STATIC
-MemRecTSetRcvrEnDly (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       UINT8 Receiver,
-  IN       UINT16 RcvEnDly
-  );
-
-VOID
-STATIC
-MemRecTLoadRcvrEnDly (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       UINT8 Receiver
-  );
-
-BOOLEAN
-STATIC
-MemRecTSaveRcvrEnDly (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       UINT8 Receiver,
-  IN       UINT16 RcvEnDly,
-  IN       UINT8 CmpResult
-  );
-
-UINT8
-STATIC
-MemRecTCompare1ClPattern (
-  IN       UINT8 Buffer[],
-  IN       UINT8 Pattern[],
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-STATIC
-MemRecTBeginTraining (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-VOID
-STATIC
-MemRecTEndTraining (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function executes receiver enable training for BSP
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-MemRecTTrainRcvrEnSw (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  _16BYTE_ALIGN  UINT8  PatternBuffer[3 * 64];
-  UINT8  TestBuffer[120];
-  UINT8  *PatternBufPtr[2];
-  UINT32 TestAddr[4];
-  UINT8  TestResult;
-  UINT8 Receiver;
-  UINT8 i;
-  UINT8 j;
-  UINT16 RcvrEnDly;
-
-  MEM_DATA_STRUCT *MemPtr;
-  DIE_STRUCT *MCTPtr;
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-  MemPtr = NBPtr->MemPtr;
-  MCTPtr = NBPtr->MCTPtr;
-
-  AGESA_TESTPOINT (TpProcMemReceiverEnableTraining, &(MemPtr->StdHeader));
-
-  // Set environment settings before training
-  MemRecTBeginTraining (TechPtr);
-
-  PatternBufPtr[0] = PatternBuffer;
-  MemRecUFillTrainPattern (TestPattern0, PatternBufPtr[0], 64, &(MemPtr->StdHeader));
-  PatternBufPtr[1] = PatternBufPtr[0] + 128;
-  MemRecUFillTrainPattern (TestPattern1, PatternBufPtr[1], 64, &(MemPtr->StdHeader));
-
-  // Begin receiver enable training
-  MemRecTSetWrDatRdDqs (TechPtr, 0);
-
-  // there are four receiver pairs, loosely associated with chipselects.
-  Receiver = NBPtr->DimmToBeUsed << 1;
-  TechPtr->DqsRcvEnSaved = 0;
-
-  TestAddr[0] = NBPtr->GetSysAddrRec (NBPtr);
-  TestAddr[1] = TestAddr[0] + BIGPAGE_X8;
-
-  IDS_HDT_CONSOLE ("\tDct %d\n", NBPtr->Dct);
-  IDS_HDT_CONSOLE ("\t\tCS %d\n", Receiver);
-  IDS_HDT_CONSOLE ("\t\t\tWrite to addresses:  %04x0000\n", TestAddr[0]);
-
-  // Sweep receiver enable delays
-  AGESA_TESTPOINT (TpProcMemRcvrStartSweep, &(MemPtr->StdHeader));
-  for (RcvrEnDly = 0; RcvrEnDly < 0xFF; RcvrEnDly++) {
-
-    TestResult = 0xFF;
-    for (i = 0; i < 2; i++) {
-
-      // Set RcvrEn delay for all byte lanes
-      AGESA_TESTPOINT (TpProcMemRcvrSetDelay, &(MemPtr->StdHeader));
-      MemRecTSetRcvrEnDly (TechPtr, Receiver, RcvrEnDly);
-
-      // Swap the test pointers such that even and odd steps alternate.
-      j = ((RcvrEnDly & 1) != 0) ? (i ^ 1) : i;
-
-      // Write, read and compare the first beat of data
-      AGESA_TESTPOINT (TpProcMemRcvrWritePattern, &(MemPtr->StdHeader));
-      MemRecUWrite1CL (TestAddr[j], PatternBufPtr[j]);
-      AGESA_TESTPOINT (TpProcMemRcvrReadPattern, &(MemPtr->StdHeader));
-      MemRecURead1CL (TestBuffer, TestAddr[j]);
-      AGESA_TESTPOINT (TpProcMemRcvrTestPattern, &(MemPtr->StdHeader));
-      TestResult &= MemRecTCompare1ClPattern (TestBuffer, PatternBufPtr[j], &(MemPtr->StdHeader));
-      MemRecUProcIOClFlush (TestAddr[j], MemPtr);
-    }
-    IDS_HDT_CONSOLE ("%v0");
-    IDS_HDT_CONSOLE ("\t\t\tDly %3x%vh1\n", RcvrEnDly);
-    IDS_HDT_CONSOLE ("\t\t\t       %vh2\n");
-    IDS_HDT_CONSOLE ("\t\t\t       %vh3\n\n");
-
-    if (MemRecTSaveRcvrEnDly (TechPtr, Receiver, RcvrEnDly, TestResult)) {
-      // if all bytelanes pass
-      break;
-    }
-  }   // End of delay sweep
-
-  if (RcvrEnDly == 0xFF) {
-    // no passing window
-    // LibAmdEventLog (AGESA_ERROR, MEM_ERROR_RCVR_EN_NO_PASSING_WINDOW, 0, NBPtr->Dct, NBPtr->Channel, 0);   //@attention commented out since it is not defined in recovery code
-    SetMemRecError (AGESA_ERROR, MCTPtr);
-  }
-
-  // set final delays
-  MemRecTLoadRcvrEnDly (TechPtr, Receiver);
-
-  // Clear training bit when done
-  NBPtr->SetBitField (NBPtr, BFDqsRcvEnTrain, 0);
-
-  IDS_HDT_CONSOLE ("\t\tMaxRcvrEnDly: %03x\n", RcvrEnDly + 0x20);
-
-  // Set Max Latency for both channels
-  NBPtr->SetMaxLatency (NBPtr, RcvrEnDly + 0x20);
-
-  // Restore environment settings after training
-  MemRecTEndTraining (TechPtr);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      If WrDatDly is 0, this function sets the DQS Positions in preparation
- *      for Receiver Enable Training. (Write Position is no delay, Read Position is 1.5 Memclock delay).
- *      Otherwise it will set WrDat and RdDqs to center of data eye.
- *
- *     @param[in,out]   *TechPtr - Pointer to the MEM_TECH_BLOCK
- *     @param[in]       WrDatDly - either 0 or 0x0F
- *
- */
-
-VOID
-MemRecTSetWrDatRdDqs (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       UINT8 WrDatDly
-  )
-{
-  UINT8 ByteLane;
-  UINT8 Dimm;
-  UINT8 WrDqs;
-  UINT8 RdDqs;
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-
-  Dimm = NBPtr->DimmToBeUsed;
-  for (ByteLane = 0; ByteLane < 8; ByteLane++) {
-    WrDqs = NBPtr->ChannelPtr->WrDqsDlys[(Dimm * MAX_BYTELANES) + ByteLane];
-    NBPtr->SetTrainDly (NBPtr, AccessWrDatDly, DIMM_BYTE_ACCESS (Dimm, ByteLane), WrDqs + WrDatDly);
-    RdDqs = (WrDatDly == 0) ? 0x2F : 0x0F;
-    NBPtr->SetTrainDly (NBPtr, AccessRdDqsDly, DIMM_BYTE_ACCESS (Dimm, ByteLane), RdDqs);
-  }
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *  This function programs DqsRcvEnDly to additional index for DQS receiver enabled training
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *     @param[in]       Receiver  - Current Chip select value
- *     @param[in]       RcvEnDly  - receiver enable delay to be saved
- *
- */
-
-VOID
-STATIC
-MemRecTSetRcvrEnDly (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       UINT8 Receiver,
-  IN       UINT16 RcvEnDly
-  )
-{
-  UINT8 ByteLane;
-
-  ASSERT (Receiver <= MAX_CS_PER_CHANNEL);
-  for (ByteLane = 0; ByteLane < 8; ByteLane++) {
-    TechPtr->NBPtr->SetTrainDly (TechPtr->NBPtr, AccessRcvEnDly, DIMM_BYTE_ACCESS (Receiver >> 1, ByteLane), RcvEnDly);
-  }
-}
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *       This function compares test pattern with data in buffer and return a pass/fail bitmap
- *       for 8 Bytes
- *
- *     @param[in]       Buffer[]  -  Buffer data from DRAM (Measured data from DRAM) to compare
- *     @param[in]       Pattern[]  - Pattern (Expected data in ROM/CACHE) to compare against
- *     @param[in,out] StdHeader - The Pointer of AGESA Header.
- *
- *     @return  PASS - Bit map of results of comparison
- */
-
-UINT8
-STATIC
-MemRecTCompare1ClPattern (
-  IN       UINT8 Buffer[],
-  IN       UINT8 Pattern[],
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT8 i;
-  UINT8 Pass;
-
-  Pass = 0xFF;
-  IDS_HDT_CONSOLE ("%v1 -");
-  IDS_HDT_CONSOLE ("%v2 -");
-  IDS_HDT_CONSOLE ("%v3 -");
-  for (i = 0; i < 8; i++) {
-    if (Buffer[i] != Pattern[i]) {
-      // if bytelane n fails
-      Pass &= ~((UINT16) 1 << (i % 8));    // clear bit n
-    }
-    IDS_HDT_CONSOLE ("%v1  %c", (Buffer[i] == Pattern[i]) ? 'P' : '.');
-    IDS_HDT_CONSOLE ("%v2 %02x", Buffer[i]);
-    IDS_HDT_CONSOLE ("%v3 %02x", Pattern[i]);
-  }
-  return Pass;
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *  This function saves passing DqsRcvEnDly values to the stack
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *     @param[in]       Receiver  - Current Chip select value
- *     @param[in]       RcvEnDly  - receiver enable delay to be saved
- *     @param[in]       CmpResult - compare result for Rank 0
- *
- *     @return  TRUE - All bytelanes pass
- *     @return  FALSE - Some bytelanes fail
- */
-
-BOOLEAN
-STATIC
-MemRecTSaveRcvrEnDly (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       UINT8 Receiver,
-  IN       UINT16 RcvEnDly,
-  IN       UINT8 CmpResult
-  )
-{
-  UINT8 i;
-  UINT8 Passed;
-  UINT8 Saved;
-  UINT8 Mask;
-  UINT8 Dimm;
-
-  ASSERT (Receiver <= MAX_CS_PER_CHANNEL);
-
-  Passed = CmpResult;
-  Saved = (UINT8) (TechPtr->DqsRcvEnSaved & Passed); //@todo - false passes filter (subject to be replaced with a better solution)
-  Dimm = Receiver >> 1;
-  Mask = 1;
-  for (i = 0; i < 8; i++) {
-    if ((Passed & Mask) != 0) {
-      if ((Saved & Mask) == 0) {
-        TechPtr->NBPtr->ChannelPtr->RcvEnDlys[Dimm * MAX_BYTELANES + i] = (UINT8) (RcvEnDly + 0x20);
-        IDS_HDT_CONSOLE ("\t\t\tBL %d = %02x", i, RcvEnDly + 0x20);
-      }
-      Saved |= Mask;
-    }
-    Mask <<= 1;
-  }
-  TechPtr->DqsRcvEnSaved = Saved;
-
-  if (Saved == 0xFF) {
-    return TRUE;
-  } else {
-    return FALSE;
-  }
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *  This function loads the DqsRcvEnDly from saved data and program to additional index
- *  for DQS receiver enabled training
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *     @param[in]       Receiver  - Current Chip select value
- *
- */
-
-VOID
-STATIC
-MemRecTLoadRcvrEnDly (
-  IN OUT   MEM_TECH_BLOCK *TechPtr,
-  IN       UINT8 Receiver
-  )
-{
-  UINT8 i;
-  UINT8 Dimm;
-  UINT16 Saved;
-  CH_DEF_STRUCT *ChannelPtr;
-
-  ASSERT (Receiver <= MAX_CS_PER_CHANNEL);
-  ChannelPtr = TechPtr->NBPtr->ChannelPtr;
-
-  Dimm = Receiver >> 1;
-  Saved = TechPtr->DqsRcvEnSaved;
-  for (i = 0; i < 8; i++) {
-    if ((Saved & 1) != 0) {
-      TechPtr->NBPtr->SetTrainDly (TechPtr->NBPtr, AccessRcvEnDly, DIMM_BYTE_ACCESS (Receiver >> 1, i),
-      ChannelPtr->RcvEnDlys[Dimm * MAX_BYTELANES + i]);
-    }
-    Saved >>= 1;
-  }
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function sets the initial controller environment before training.
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-STATIC
-MemRecTBeginTraining (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  S_UINT64 SMsr;
-  MEM_DATA_STRUCT *MemPtr;
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-  MemPtr = NBPtr->MemPtr;
-
-  LibAmdReadCpuReg (CR4_REG, &TechPtr->CR4reg);
-  LibAmdWriteCpuReg (CR4_REG, TechPtr->CR4reg | ((UINT32) 1 << 9)); // enable SSE2
-
-  LibAmdMsrRead (HWCR, (UINT64 *) (&SMsr), &MemPtr->StdHeader);            // HWCR
-  TechPtr->HwcrLo = SMsr.lo;
-  SMsr.lo |= 0x00020000;                  // turn on HWCR.wrap32dis
-  SMsr.lo &= 0xFFFF7FFF;                  // turn off HWCR.SSEDIS
-  LibAmdMsrWrite (HWCR, (UINT64 *) (&SMsr), &MemPtr->StdHeader);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function sets the final controller environment after training.
- *
- *     @param[in,out]   *TechPtr   - Pointer to the MEM_TECH_BLOCK
- *
- */
-
-VOID
-STATIC
-MemRecTEndTraining (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  )
-{
-  S_UINT64 SMsr;
-  MEM_DATA_STRUCT *MemPtr;
-  MEM_NB_BLOCK  *NBPtr;
-
-  NBPtr = TechPtr->NBPtr;
-  MemPtr = NBPtr->MemPtr;
-
-  LibAmdWriteCpuReg (CR4_REG, TechPtr->CR4reg);
-
-  LibAmdMsrRead (HWCR, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  SMsr.lo = TechPtr->HwcrLo;
-  LibAmdMsrWrite (HWCR, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrdef.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrdef.c
deleted file mode 100644
index 88065d9da0..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrdef.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/**
- * @file
- *
- * mdef.c
- *
- * Memory Controller header file
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-  *
-  * Copyright (c) 2011, Advanced Micro Devices, Inc.
-  * All rights reserved.
-  *
-  * Redistribution and use in source and binary forms, with or without
-  * modification, are permitted provided that the following conditions are met:
-  *     * Redistributions of source code must retain the above copyright
-  *       notice, this list of conditions and the following disclaimer.
-  *     * Redistributions in binary form must reproduce the above copyright
-  *       notice, this list of conditions and the following disclaimer in the
-  *       documentation and/or other materials provided with the distribution.
-  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-  *       its contributors may be used to endorse or promote products derived
-  *       from this software without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  * ***************************************************************************
-  *
- */
-
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-#include "AGESA.h"
-#include "mm.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_MRDEF_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *         This is the default return function
- */
-
-VOID
-MemRecDefRet (VOID)
-{
-}
-
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function programs the DCT with initial values
- *
- *
- *     @param[in,out]   *MCTPtr  - Pointer to the DIE_STRUCT
- *     @param[in]       Errorval - Error value
- */
-
-VOID
-SetMemRecError (
-  IN       AGESA_STATUS  Errorval,
-  IN OUT   DIE_STRUCT *MCTPtr
-  )
-{
-  if (MCTPtr->ErrCode < Errorval) {
-    MCTPtr->ErrCode = Errorval;
-  }
-}
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrinit.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrinit.c
deleted file mode 100644
index 1eb113f2c5..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrinit.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/**
- * @file
- *
- * mrinit.c
- *
- * Initializer support functions for Recovery mode
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-  *
-  * Copyright (c) 2011, Advanced Micro Devices, Inc.
-  * All rights reserved.
-  *
-  * Redistribution and use in source and binary forms, with or without
-  * modification, are permitted provided that the following conditions are met:
-  *     * Redistributions of source code must retain the above copyright
-  *       notice, this list of conditions and the following disclaimer.
-  *     * Redistributions in binary form must reproduce the above copyright
-  *       notice, this list of conditions and the following disclaimer in the
-  *       documentation and/or other materials provided with the distribution.
-  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-  *       its contributors may be used to endorse or promote products derived
-  *       from this software without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  * ***************************************************************************
-  *
- */
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "mm.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_MRINIT_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-extern PSO_TABLE DefaultPlatformMemoryConfiguration[];
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *  This function initializes the default parameter, function pointers, build options
- *   and SPD data for memory configuration
- *
- *     @param[in,out]   *MemPtr   - Pointer to the MEM_DATA_STRUCT
- *
- */
-
-VOID
-AmdMemInitDataStructDefRecovery (
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  )
-{
-  MEM_PARAMETER_STRUCT *RefPtr;
-
-  RefPtr = MemPtr->ParameterListPtr;
-
-  // Memory Map/Mgt.
-  // Mask Bottom IO with 0xF8 to force hole size to have granularity of 128MB
-  RefPtr->BottomIo = 0xF0;
-
-  RefPtr->PlatformMemoryConfiguration = DefaultPlatformMemoryConfiguration;
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrm.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrm.c
deleted file mode 100644
index 04ab8d2710..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrm.c
+++ /dev/null
@@ -1,287 +0,0 @@
-/**
- * @file
- *
- * mrm.c
- *
- * Main configuration for Recovery mode
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "amdlib.h"
-#include "GeneralServices.h"
-#include "heapManager.h"
-#include "cpuServices.h"
-#include "OptionMemoryRecovery.h"
-#include "mm.h"
-#include "mn.h"
-#include "mt.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_MRM_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-#define MAX_DIES_PER_SOCKET     2
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-extern MEM_REC_NB_CONSTRUCTOR* MemRecNBInstalled[];
-extern MEM_REC_TECH_CONSTRUCTOR* MemRecTechInstalled[];
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-VOID
-STATIC
-MemRecSPDDataProcess (
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  );
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function is the Recovery memory configuration function for HY DDR3
- *
- *      Requirements:
- *
- *      Run-Time Requirements:
- *      1. Complete Hypertransport Bus Configuration
- *      2. AmdMemInitDataStructDef must be run to set default values
- *      3. MSR bit to allow access to high PCI regs set on all nodes
- *      4. BSP in Big Real Mode
- *      5. Stack available
- *      6. MCG_CTL=-1, MC4_EN=0 for all CPUs
- *      7. MCi_STS from shutdown/warm reset recorded (if desired) prior to entry
- *      8. All var MTRRs reset to zero
- *      9. State of NB_CFG.DisDatMsk set properly on all CPUs
- *
- *     @param[in,out]   *MemPtr   - Pointer to the MEM_DATA_STRUCT
- *
- *     @return          AGESA_STATUS
- *                          - AGESA_ALERT
- *                          - AGESA_FATAL
- *                          - AGESA_SUCCESS
- *                          - AGESA_WARNING
- */
-
-AGESA_STATUS
-AmdMemRecovery (
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  )
-{
-  UINT8 Socket;
-  UINT8 Module;
-  UINT8 i;
-  AGESA_STATUS AgesaStatus;
-  PCI_ADDR Address;
-  MEM_NB_BLOCK NBBlock;
-  MEM_TECH_BLOCK TechBlock;
-  LOCATE_HEAP_PTR  SocketWithMem;
-  ALLOCATE_HEAP_PARAMS AllocHeapParams;
-
-  IDS_HDT_CONSOLE_INIT (&MemPtr->StdHeader);
-
-  //
-  // Read SPD data
-  //
-  MemRecSPDDataProcess (MemPtr);
-
-  //
-  // Get the socket id from heap.
-  //
-  SocketWithMem.BufferHandle = AMD_REC_MEM_SOCKET_HANDLE;
-  if (HeapLocateBuffer (&SocketWithMem, &MemPtr->StdHeader) == AGESA_SUCCESS) {
-    Socket = *(UINT8 *) SocketWithMem.BufferPtr;
-  } else {
-    ASSERT(FALSE);  // Socket handle not found
-    return AGESA_FATAL;
-  }
-
-  //
-  // Allocate buffer for memory init structures
-  //
-  AllocHeapParams.RequestedBufferSize = MAX_DIES_PER_SOCKET * sizeof (DIE_STRUCT);
-  AllocHeapParams.BufferHandle = GENERATE_MEM_HANDLE (ALLOC_DIE_STRUCT_HANDLE, 0, 0, 0);
-  AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
-  if (HeapAllocateBuffer (&AllocHeapParams, &MemPtr->StdHeader) != AGESA_SUCCESS) {
-    ASSERT(FALSE); // Heap allocation failed to allocate Die struct
-    return AGESA_FATAL;
-  }
-  MemPtr->DieCount = MAX_DIES_PER_SOCKET;
-  MemPtr->DiesPerSystem = (DIE_STRUCT *)AllocHeapParams.BufferPtr;
-
-  //
-  // Discover populated CPUs
-  //
-  for (Module = 0; Module < MAX_DIES_PER_SOCKET; Module++) {
-    if (GetPciAddress ((VOID *)MemPtr, Socket, Module, &Address, &AgesaStatus)) {
-      MemPtr->DiesPerSystem[Module].SocketId = Socket;
-      MemPtr->DiesPerSystem[Module].DieId = Module;
-      MemPtr->DiesPerSystem[Module].PciAddr.AddressValue = Address.AddressValue;
-    }
-  }
-
-  i = 0;
-  while (MemRecNBInstalled[i] != NULL) {
-    if (MemRecNBInstalled[i] (&NBBlock, MemPtr, 0) == TRUE) {
-      break;
-    }
-    i++;
-  };
-  if (MemRecNBInstalled[i] == NULL) {
-    ASSERT(FALSE);    // No NB installed
-    return AGESA_FATAL;
-  }
-  MemRecTechInstalled[0] (&TechBlock, &NBBlock);
-  NBBlock.TechPtr = &TechBlock;
-
-  IDS_HDT_CONSOLE_EXIT (&MemPtr->StdHeader);
-
-  return NBBlock.InitRecovery (&NBBlock);
-}
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *  This function fills a default SPD buffer with SPD values for all DIMMs installed in the system
- *
- *     @param[in,out]   *MemPtr   - Pointer to the MEM_DATA_STRUCT
- *
- */
-
-VOID
-STATIC
-MemRecSPDDataProcess (
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  )
-{
-  BOOLEAN FindSocketWithMem;
-  UINT8 Channel;
-  UINT8 Dimm;
-  UINT8 MaxSockets;
-  UINT8 *SocketWithMem;
-  UINT8 Socket;
-  AGESA_STATUS AgesaStatus;
-  SPD_DEF_STRUCT *DimmSPDPtr;
-  ALLOCATE_HEAP_PARAMS AllocHeapParams;
-  AGESA_READ_SPD_PARAMS SpdParam;
-  ASSERT (MemPtr != NULL);
-  FindSocketWithMem = FALSE;
-  //
-  // Allocate heap to save socket number with memory on it.
-  //
-  AllocHeapParams.RequestedBufferSize = sizeof (UINT8);
-  AllocHeapParams.BufferHandle = AMD_REC_MEM_SOCKET_HANDLE;
-  AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
-  if (HeapAllocateBuffer (&AllocHeapParams, &MemPtr->StdHeader) == AGESA_SUCCESS) {
-    SocketWithMem = (UINT8 *) AllocHeapParams.BufferPtr;
-    *SocketWithMem = 0;
-
-    //
-    // Allocate heap for the table
-    //
-    MaxSockets = (UINT8) GetPlatformNumberOfSockets ();
-
-    AllocHeapParams.RequestedBufferSize = (MaxSockets * MAX_CHANNELS_PER_SOCKET * MAX_DIMMS_PER_CHANNEL * sizeof (SPD_DEF_STRUCT));
-    AllocHeapParams.BufferHandle = AMD_MEM_SPD_HANDLE;
-    AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
-    if (HeapAllocateBuffer (&AllocHeapParams, &MemPtr->StdHeader) == AGESA_SUCCESS) {
-      MemPtr->SpdDataStructure = (SPD_DEF_STRUCT *) AllocHeapParams.BufferPtr;
-      //
-      // Initialize SpdParam Structure
-      //
-      LibAmdMemCopy ((VOID *)&SpdParam, (VOID *)MemPtr, (UINTN)sizeof (SpdParam.StdHeader), &MemPtr->StdHeader);
-      //
-      // Populate SPDDataBuffer
-      //
-
-      SpdParam.MemData = MemPtr;
-      for (Socket = 0; Socket < MaxSockets; Socket ++) {
-        SpdParam.SocketId = Socket;
-        for (Channel = 0; Channel < MAX_CHANNELS_PER_SOCKET; Channel++) {
-          SpdParam.MemChannelId = Channel;
-          for (Dimm = 0; Dimm < MAX_DIMMS_PER_CHANNEL; Dimm++) {
-            SpdParam.DimmId = Dimm;
-            DimmSPDPtr = &(MemPtr->SpdDataStructure[(Socket * MAX_CHANNELS_PER_SOCKET + Channel) * MAX_DIMMS_PER_CHANNEL + Dimm]);
-            SpdParam.Buffer = DimmSPDPtr->Data;
-            AgesaStatus = AgesaReadSpdRecovery (0, &SpdParam);
-            if (AgesaStatus == AGESA_SUCCESS) {
-              DimmSPDPtr->DimmPresent = TRUE;
-              if (!FindSocketWithMem) {
-                FindSocketWithMem = TRUE;
-              }
-            } else {
-              DimmSPDPtr->DimmPresent = FALSE;
-            }
-          }
-        }
-        if (FindSocketWithMem) {
-          *SocketWithMem = Socket;
-          break;
-        }
-      }
-    }
-  }
-}
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrport.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrport.h
deleted file mode 100644
index 5511958ca9..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrport.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/**
- * @file
- *
- * mport.h
- *
- * API's to support different OS
- *
- * A detailed description, giving important information about this file.
- * Omit the detailed description if none is needed.  For other than the
- * simplest files, there should be one.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Memory
- * @e \$Revision: 44323 $   @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- *===========================================================================
- *  AMD Revision History
- *  Initial Version
- *
- */
-#ifndef _MPORT_H_
-#define _MPORT_H_
-
-///< 64 bit data structure
-///< lo - Lower 32 bits
-///< hi - Upper 32 bits
-typedef struct _S_UINT64 {
-  UINT32 lo; ///< Lower 32 bits
-  UINT32 hi; ///< Upper 32 bits
-} S_UINT64;
-/*
- *   SBDFO - Segment Bus Device Function Offset
- *   31:28   Segment (4-bits)
- *   27:20   Bus     (8-bits)
- *   19:15   Device  (5-bits)
- *   14:12   Function(3-bits)
- *   11:00   Offset  (12-bits)
- */
-typedef UINT32 SBDFO;
-
-//#define MAKE_SBDFO(seg,bus,dev,fun,off) ((((UINT32)(seg))<<28) | (((UINT32)(bus))<<20) | \
-//                   (((UINT32)(dev))<<15) | (((UINT32)(fun))<<12) | ((UINT32)(off)))
-//#define SBDFO_SEG(x) (((UINT32)(x)>>28) & 0x0F)
-//#define SBDFO_BUS(x) (((UINT32)(x)>>20) & 0xFF)
-//#define SBDFO_DEV(x) (((UINT32)(x)>>15) & 0x1F)
-//#define SBDFO_FUN(x) (((UINT32)(x)>>12) & 0x07)
-//#define SBDFO_OFF(x) (((UINT32)(x)) & 0xFFF)
-//#define ILLEGAL_SBDFO 0xFFFFFFFF
-
-
-#define GET_SIZE_OF(x)   (sizeof (x) / sizeof (x[0]))
-
-#endif /* _MPORT_H_ */
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrt3.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrt3.h
deleted file mode 100644
index b1bf7651b9..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrt3.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/**
- * @file
- *
- * mrt3.h
- *
- * Common Technology  Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 5655 $ @e \$Date: 2008-04-03 23:29:23 -0500 (Thu, 03 Apr 2008) $
- *
- **/
-/*****************************************************************************
-  *
-  * Copyright (c) 2011, Advanced Micro Devices, Inc.
-  * All rights reserved.
-  *
-  * Redistribution and use in source and binary forms, with or without
-  * modification, are permitted provided that the following conditions are met:
-  *     * Redistributions of source code must retain the above copyright
-  *       notice, this list of conditions and the following disclaimer.
-  *     * Redistributions in binary form must reproduce the above copyright
-  *       notice, this list of conditions and the following disclaimer in the
-  *       documentation and/or other materials provided with the distribution.
-  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-  *       its contributors may be used to endorse or promote products derived
-  *       from this software without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  * ***************************************************************************
-  *
- */
-
-#ifndef _MRT3_H_
-#define _MRT3_H_
-
-/*----------------------------------------------------------------------------
- *   Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
- *
- *----------------------------------------------------------------------------
- */
-
-/*-----------------------------------------------------------------------------
- *                         DEFINITIONS AND MACROS
- *
- *-----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                         TYPEDEFS, STRUCTURES, ENUMS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           FUNCTIONS PROTOTYPE
- *
- *----------------------------------------------------------------------------
- */
-
-VOID
-MemRecTTrainDQSWriteHw3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-VOID
-MemRecTDramInitSw3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-BOOLEAN
-MemRecTSetDramMode3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-BOOLEAN
-MemRecTDIMMPresence3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-VOID
-MemRecTEMRS13 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-VOID
-MemRecTEMRS23 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-VOID
-MemRecTEMRS33 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-VOID
-MemRecTMRS3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-VOID
-MemRecTDramControlRegInit3 (
-  IN OUT   MEM_TECH_BLOCK *TechPtr
-  );
-
-#endif  /* _MRT3_H_ */
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.h
deleted file mode 100644
index 6d697166f6..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.h
+++ /dev/null
@@ -1,131 +0,0 @@
-/**
- * @file
- *
- * mru.h
- *
- * Utility support Recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-  *
-  * Copyright (c) 2011, Advanced Micro Devices, Inc.
-  * All rights reserved.
-  *
-  * Redistribution and use in source and binary forms, with or without
-  * modification, are permitted provided that the following conditions are met:
-  *     * Redistributions of source code must retain the above copyright
-  *       notice, this list of conditions and the following disclaimer.
-  *     * Redistributions in binary form must reproduce the above copyright
-  *       notice, this list of conditions and the following disclaimer in the
-  *       documentation and/or other materials provided with the distribution.
-  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-  *       its contributors may be used to endorse or promote products derived
-  *       from this software without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  * ***************************************************************************
-  *
- */
-
-#ifndef _MRU_H_
-#define _MRU_H_
-
-/*----------------------------------------------------------------------------
- *   Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
- *
- *----------------------------------------------------------------------------
- */
-
-/*-----------------------------------------------------------------------------
- *                         DEFINITIONS AND MACROS
- *
- *-----------------------------------------------------------------------------
- */
-#ifndef PSO_ENTRY
-  #define PSO_ENTRY UINT8
-#endif
-
-/*----------------------------------------------------------------------------
- *                         TYPEDEFS, STRUCTURES, ENUMS
- *
- *----------------------------------------------------------------------------
- */
-
-/// Test patterns for DQS training
-typedef enum {
-  TestPattern0,             ///< Test pattern used in first pass of receiver enable training
-  TestPattern1,             ///< Test pattern used in first pass of receiver enable training
-  TestPattern2,             ///< Test pattern used in second pass of receiver enable training
-  TestPatternJD1B,          ///< 72-bit test pattern used in position training (ganged mode)
-  TestPatternJD1A,          ///< 72-bit test pattern used in position training
-  TestPatternML             ///< Test pattern used in first pass of max latency training
-} TRAIN_PATTERN;
-
-/*----------------------------------------------------------------------------
- *                           FUNCTIONS PROTOTYPE
- *
- *----------------------------------------------------------------------------
- */
-VOID
-MemRecUWrite1CL (
-  IN       UINT32 Address,
-  IN       UINT8 Pattern[]
-  );
-
-VOID
-MemRecURead1CL (
-  IN       UINT8 Buffer[],
-  IN       UINT32 Address
-  );
-
-VOID
-MemRecUFlushPattern (
-  IN       UINT32 Address
-  );
-
-VOID
-MemRecUFillTrainPattern (
-  IN       TRAIN_PATTERN Pattern,
-  IN       UINT8 Buffer[],
-  IN       UINT16 Size,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-MemRecUProcIOClFlush (
-  IN       UINT32 Address,
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  );
-
-VOID
-MemRecUWait10ns (
-  IN       UINT32 Count,
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  );
-
-VOID *
-MemRecFindPSOverrideEntry (
-  IN       PSO_TABLE *PlatformMemoryConfiguration,
-  IN       PSO_ENTRY EntryType,
-  IN       UINT8 SocketID,
-  IN       UINT8 ChannelID
-  );
-
-#endif  /* _MRU_H_ */
-
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mruc.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mruc.c
deleted file mode 100644
index 515f9935e7..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mruc.c
+++ /dev/null
@@ -1,262 +0,0 @@
-/**
- * @file
- *
- * mruc.c
- *
- * Utility functions recovery
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: (Proc/Recovery/Mem)
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- **/
-/*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
-* All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*     * Redistributions of source code must retain the above copyright
-*       notice, this list of conditions and the following disclaimer.
-*     * Redistributions in binary form must reproduce the above copyright
-*       notice, this list of conditions and the following disclaimer in the
-*       documentation and/or other materials provided with the distribution.
-*     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-*       its contributors may be used to endorse or promote products derived
-*       from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-* ***************************************************************************
-*
-*/
-
-/*
- *----------------------------------------------------------------------------
- *                                MODULES USED
- *
- *----------------------------------------------------------------------------
- */
-
-
-#include "AGESA.h"
-#include "OptionMemory.h"
-#include "PlatformMemoryConfiguration.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "mrport.h"
-#include "mru.h"
-#include "Filecode.h"
-#define FILECODE PROC_RECOVERY_MEM_MRUC_FILECODE
-/*----------------------------------------------------------------------------
- *                          DEFINITIONS AND MACROS
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                           TYPEDEFS AND STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- *                        PROTOTYPES OF LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-VOID
-STATIC
-MemRecUResetTargetWTIO (
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  );
-
-VOID
-STATIC
-MemRecUSetTargetWTIO (
-  IN       UINT32 Address,
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  );
-
-
-/*----------------------------------------------------------------------------
- *                            EXPORTED FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function returns the (Index)th UINT8
- *   from an indicated test Pattern.
- *
- *     @param[in] Pattern - encoding of test Pattern type
- *     @param[in] Buffer[] - buffer to be filled
- *     @param[in] Size - Size of the bugger
- *     @param[in] *StdHeader - pointer to AMD_CONFIG_PARAMS
- *
- */
-
-VOID
-MemRecUFillTrainPattern (
-  IN       TRAIN_PATTERN Pattern,
-  IN       UINT8 Buffer[],
-  IN       UINT16 Size,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  STATIC UINT8 PatternData[2] = {0x55, 0xAA};
-
-  LibAmdMemFill (Buffer, PatternData[Pattern == TestPattern0 ? TestPattern1 : TestPattern0], Size, StdHeader);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function flushes cache lines
- *
- *     @param[in] Address - System Address [39:8]
- *     @param[in,out] *MemPtr - Pointer to MEM_DATA_STRUCT
- *
- */
-
-VOID
-MemRecUProcIOClFlush (
-  IN       UINT32 Address,
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  )
-{
-  MemRecUSetTargetWTIO (Address, MemPtr);
-  MemRecUFlushPattern (Address);
-  MemRecUResetTargetWTIO (MemPtr);
-}
-
-/*----------------------------------------------------------------------------
- *                              LOCAL FUNCTIONS
- *
- *----------------------------------------------------------------------------
- */
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      This function resets the target address space to Write Through IO by disabling IORRs
- */
-
-VOID
-STATIC
-MemRecUResetTargetWTIO (
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  )
-{
-  S_UINT64 Smsr;
-  Smsr.hi = 0;
-  Smsr.lo = 0;
-  LibAmdMsrWrite (IORR0_MASK, (UINT64 *)&Smsr, &MemPtr->StdHeader);
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *       This function sets the target range to WT IO (using an IORR overlapping
- *       the already existing
- *      @param[in,out] *MemPtr - pointer to MEM_DATA_STRUCTURE
- *      @param[in] Address - System Address
- *
- */
-
-VOID
-STATIC
-MemRecUSetTargetWTIO (
-  IN       UINT32 Address,
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  )
-{
-  S_UINT64 SMsr;
-
-  SMsr.lo = Address;
-  SMsr.hi = 0;
-  LibAmdMsrWrite (IORR0_BASE,(UINT64 *)&SMsr, &MemPtr->StdHeader);          // ;IORR0 Base
-  SMsr.hi = 0xFFFF;
-  SMsr.lo = 0xFC000800;
-  LibAmdMsrWrite (IORR0_MASK, (UINT64 *)&SMsr, &MemPtr->StdHeader);          // ;64MB Mask
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *  Waits specified number of 10ns cycles
- *      @param[in,out] MemPtr - pointer to MEM_DATA_STRUCTURE
- *      @param[in] Count - Number of 10ns cycles to wait
- *
- */
-
-VOID
-MemRecUWait10ns (
-  IN       UINT32 Count,
-  IN OUT   MEM_DATA_STRUCT *MemPtr
-  )
-{
-  S_UINT64 SMsr;
-
-  LibAmdMsrRead (TSC, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  Count += SMsr.lo;
-  while (SMsr.lo < Count) {
-    LibAmdMsrRead (TSC, (UINT64 *)&SMsr, &MemPtr->StdHeader);
-  }
-}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *      Find the entry of platform specific overriding table.
- *
- *      @param[in] PlatformMemoryConfiguration - Platform config table
- *      @param[in] EntryType - Entry type
- *      @param[in] SocketID - Physical socket ID
- *      @param[in] ChannelID - Physical channel ID
- *
- *      @return  NULL - entry could not be found.
- *      @return  Pointer - points to the entry's data.
- *
- * ----------------------------------------------------------------------------
- */
-VOID *
-MemRecFindPSOverrideEntry (
-  IN       PSO_TABLE *PlatformMemoryConfiguration,
-  IN       PSO_ENTRY EntryType,
-  IN       UINT8 SocketID,
-  IN       UINT8 ChannelID
-  )
-{
-  UINT8 *Buffer;
-
-  Buffer = PlatformMemoryConfiguration;
-  while (Buffer[0] != PSO_END) {
-    if (Buffer[0] == EntryType) {
-      if ((Buffer[2] & ((UINT8) 1 << SocketID)) != 0 ) {
-        if ((Buffer[3] & ((UINT8) 1 << ChannelID)) != 0 ) {
-          ASSERT ((Buffer[0] == PSO_MAX_DIMMS) ? (Buffer[4] <= MAX_DIMMS_PER_CHANNEL) : TRUE);
-          ASSERT ((Buffer[0] == PSO_MAX_CHIPSELS) ? (Buffer[4] <= MAX_CS_PER_CHANNEL) : TRUE);
-          ASSERT ((Buffer[0] == PSO_MAX_CHNLS) ? (Buffer[4] <= MAX_CHANNELS_PER_SOCKET) : TRUE);
-          return &Buffer[4];
-        }
-      }
-    }
-    Buffer += Buffer[1] + 2;
-  }
-  return NULL;
-}
-
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/recoveryPage.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/recoveryPage.h
deleted file mode 100644
index a2a8067425..0000000000
--- a/src/vendorcode/amd/agesa/f10/Proc/Recovery/recoveryPage.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/**
- * @file
- *
- * Create outline and references for Recovery Component mainpage documentation.
- *
- * Design guides, maintenance guides, and general documentation, are
- * collected using this file onto the documentation mainpage.
- * This file contains doxygen comment blocks, only.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Documentation
- * @e \$Revision: 44323 $   @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-/**
- * @page recoverymain Recovery Component Documentation
- *
- * Additional documentation for the Recovery component consists of
- *
- * - Maintenance Guides:
- *   - add here >>>
- * - Design Guides:
- *   - add here >>>
- *
- */