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authorLijian Zhao <lijian.zhao@intel.com>2017-07-14 11:09:10 -0700
committerMartin Roth <martinroth@google.com>2017-07-21 15:56:16 +0000
commitdbe7f893c0e3fffc4e9862d872d65df752feaf9d (patch)
tree2d0d3e2fd4f7d5313026440a62208cb40428bcd0 /src/vboot/vbnv_layout.h
parent399c022a8c6cba7ad6d75fdf377a690395877611 (diff)
soc/intel/cannonlake: Call into FSP siliconinit
The following changes can make system call into FSP siliconinit and exit from that until payloads. 1. Add frame to call fspsinit. 2. Temporarily set all the USB OC pin to 0 to pass FSP siliconinit. Change-Id: I1c9c35ececf3c28d7a024f10a5d326700cc8ac49 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/20581 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vboot/vbnv_layout.h')
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