summaryrefslogtreecommitdiff
path: root/src/superio
diff options
context:
space:
mode:
authorKeith Hui <buurin@gmail.com>2024-04-15 23:14:56 -0400
committerFelix Held <felix-coreboot@felixheld.de>2024-04-18 11:04:25 +0000
commitf5b993de4fcf9b1153681e64285139e69e2c87cd (patch)
tree700fb1fbb6749b56b9d535419f64e56c2d888b89 /src/superio
parent8b5aacca3f2c16fc4153887a6289e2c3eca9d10d (diff)
sio/nuvoton/nct6779d: Correct GPIOBASE virtual LDN
According to datasheet, the enable bit for direct I/O access to GPIO lines is at CR30[3] of LDN 8, not [0] as currently coded. Change-Id: Id2f997aebc36a2fcaa8c3763f324d3b288f785d2 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81926 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/superio')
-rw-r--r--src/superio/nuvoton/nct6779d/nct6779d.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/superio/nuvoton/nct6779d/nct6779d.h b/src/superio/nuvoton/nct6779d/nct6779d.h
index 85f4081368..30694ea5c8 100644
--- a/src/superio/nuvoton/nct6779d/nct6779d.h
+++ b/src/superio/nuvoton/nct6779d/nct6779d.h
@@ -22,7 +22,7 @@
/* virtual LDN for GPIO */
-#define NCT6779D_GPIOBASE ((0 << 8) | NCT6779D_WDT1_GPIO01_V)
+#define NCT6779D_GPIOBASE ((3 << 8) | NCT6779D_WDT1_GPIO01_V)
#define NCT6779D_GPIO0 ((1 << 8) | NCT6779D_WDT1_GPIO01_V)
#define NCT6779D_GPIO1 ((1 << 8) | NCT6779D_GPIO12345678_V)