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author | Konstantin Aladyshev <aladyshev@nicevt.ru> | 2013-03-06 21:39:40 +0400 |
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committer | Marc Jones <marc.jones@se-eng.com> | 2013-03-08 07:27:51 +0100 |
commit | 4c1e906e36252db3361d7df4c3764b352f53e2f3 (patch) | |
tree | 45f08a225516a2d457d51bc8465bdabce3c31817 /src/superio/via | |
parent | 7fcbbb09fd788a9a1791c2abab96359ce960a2cc (diff) |
Supermicro H8QGI: set up right frequency limits for memory controller
According to BKDG:
"Memory controller (MCT) and DRAM controllers (DCTs) additions:
• Support for 933 MHz (1866 MT/s) MEMCLK frequency."
Change-Id: I6f307ce3fcb355d5445f1ea86def73a41b928a57
Signed-off-by: Konstantin Aladyshev <aladyshev@nicevt.ru>
Reviewed-on: http://review.coreboot.org/2589
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/superio/via')
0 files changed, 0 insertions, 0 deletions