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authorBora Guvendik <bora.guvendik@intel.com>2018-03-08 16:21:12 -0800
committerPatrick Georgi <pgeorgi@google.com>2018-10-11 10:57:07 +0000
commit39363744cc76a793ab429c039ff5c75e56c3b368 (patch)
tree42f04637af026d40a8d0c7c9648389c4df0a99d8 /src/superio/smsc
parent4356e09235b911ad0c66f7467e25f6a88e823009 (diff)
commonlib/storage: Make pci sdhci code compile in romstage
In romstage malloc is not available, so use CAR_GLOBAL variable instead. BUG=b:78106689 TEST=Boot to OS Change-Id: If9438d0b707c6ffaa61db80bd1d385112bc91cfc Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/25067 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/superio/smsc')
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