diff options
author | York Yang <york.yang@intel.com> | 2015-10-14 07:00:30 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2015-11-16 17:42:56 +0100 |
commit | f41ad02c83b66e72d68801413a15cf869bc97268 (patch) | |
tree | 4a578ece08c9482d21209b2c8fe0c53f15866415 /src/superio/smsc/sio1036/superio.c | |
parent | 3ecfdbde14851b408b9f0dd4006c2f733731fedb (diff) |
intel/fsp_baytrail: Load BSP microcode in bootblock
Load microcode to BSP in bootblock so later on the FSP TempRamInit call
can be success. The updated fsp1_0 driver calls TempRamInit API with a
dummy microcode, so FSP will not handle the microcode load. If BSP is
not loaded a microcode before calling TempRamInit API, the call will
fail with the error No Valid Microcode Was Found.
Change-Id: I1fbe68e14e5a24d8f2da70603cd2f03675b9ca81
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: http://review.coreboot.org/11896
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/superio/smsc/sio1036/superio.c')
0 files changed, 0 insertions, 0 deletions