src/superio: Remove unused superio chips

These SIOs are not being used or tested by abuild, so remove them from the
tree. The only 3 currently unused SIOs that don't get removed here have board
ports in review.

src/superio/fintek/f71805f
src/superio/fintek/f71872
src/superio/intel/i8900
src/superio/ite/it8671f
src/superio/ite/it8716f
src/superio/nsc/pc87309
src/superio/nsc/pc87360
src/superio/nsc/pc87366
src/superio/nsc/pc97317
src/superio/smsc/dme1737
src/superio/smsc/lpc47b272
src/superio/smsc/lpc47b397
src/superio/smsc/sch4037
src/superio/smsc/sio1036
src/superio/via/vt1211
src/superio/winbond/w83697hf
src/superio/winbond/wpcd376i

Signed-off-by: Martin Roth <martin@coreboot.org>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I61d486d2c1e2b85eb292eaa78316c36e1735ebf4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35428
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

5 files changed, 0 insertions, 196 deletions

diff --git a/src/superio/smsc/sch4037/Kconfig b/src/superio/smsc/sch4037/Kconfig
deleted file mode 100644
index ce87f75b2f..0000000000
--- a/src/superio/smsc/sch4037/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2012 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_SMSC_SCH4037
-	bool
diff --git a/src/superio/smsc/sch4037/Makefile.inc b/src/superio/smsc/sch4037/Makefile.inc
deleted file mode 100644
index ac7d7de652..0000000000
--- a/src/superio/smsc/sch4037/Makefile.inc
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2012 Advanced Micro Devices, Inc.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-
-bootblock-$(CONFIG_SUPERIO_SMSC_SCH4037) += sch4037_early_init.c
-romstage-$(CONFIG_SUPERIO_SMSC_SCH4037) += sch4037_early_init.c
-ramstage-$(CONFIG_SUPERIO_SMSC_SCH4037) += superio.c
diff --git a/src/superio/smsc/sch4037/sch4037.h b/src/superio/smsc/sch4037/sch4037.h
deleted file mode 100644
index f0fa3cda0f..0000000000
--- a/src/superio/smsc/sch4037/sch4037.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_SCH_4037_H
-#define SUPERIO_SCH_4037_H
-
-#define SCH4037_FDD              0            /* FDD */
-#define SCH4037_LPT              3            /* LPT */
-#define SMSCSUPERIO_SP1          4            /* Com1 */
-#define SMSCSUPERIO_SP2          5            /* Com2 */
-#define SCH4037_RTC              6            /* RTC */
-#define SCH4037_KBC              7            /* KBC */
-#define SCH4037_HWM              8            /* HWM */
-#define SCH4037_RUNTIME          0x0A         /* Runtime */
-#define SCH4037_XBUS             0x0B         /* X-BUS */
-
-void sch4037_early_init(unsigned port);
-
-#endif /* SUPERIO_SCH_4037_H */
diff --git a/src/superio/smsc/sch4037/sch4037_early_init.c b/src/superio/smsc/sch4037/sch4037_early_init.c
deleted file mode 100644
index a416ab8358..0000000000
--- a/src/superio/smsc/sch4037/sch4037_early_init.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <device/pnp.h>
-#include <stdint.h>
-
-#include "sch4037.h"
-
-static void pnp_enter_conf_state(pnp_devfn_t dev)
-{
-	unsigned port = dev >> 8;
-	outb(0x55, port);
-}
-
-static void pnp_exit_conf_state(pnp_devfn_t dev)
-{
-	unsigned port = dev >> 8;
-	outb(0xaa, port);
-}
-
-void sch4037_early_init(unsigned port)
-{
-	pnp_devfn_t dev;
-
-	dev = PNP_DEV(port, SMSCSUPERIO_SP1);
-	pnp_enter_conf_state(dev);
-
-	/* Auto power management */
-	pnp_write_config(dev, 0x22, 0x38); /* BIT3+BIT4+BIT5 */
-	pnp_write_config(dev, 0x23, 0);
-
-	/* Enable SMSC UART 0 */
-	dev = PNP_DEV(port, SMSCSUPERIO_SP1);
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 0);
-
-	pnp_set_iobase(dev, PNP_IDX_IO0, CONFIG_TTYS0_BASE);
-	pnp_set_irq(dev, PNP_IDX_IRQ0, 0x4);
-
-	/* Enabled High speed, disabled MIDI support. */
-	pnp_write_config(dev, 0xF0, 0x02);
-	pnp_set_enable(dev, 1);
-
-	/* Enable keyboard */
-	dev = PNP_DEV(port, SCH4037_KBC);
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 0);
-	pnp_set_irq(dev, 0x70, 1);   /* IRQ 1 */
-	pnp_set_irq(dev, 0x72, 12);   /* IRQ 12 */
-	pnp_set_enable(dev, 1);
-
-	pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/sch4037/superio.c b/src/superio/smsc/sch4037/superio.c
deleted file mode 100644
index 5e49aa73c5..0000000000
--- a/src/superio/smsc/sch4037/superio.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* RAM driver for the SMSC KBC1100 Super I/O chip */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-
-#include "sch4037.h"
-
-static void sch4037_init(struct device *dev)
-{
-	if (!dev->enabled) {
-		return;
-	}
-
-	switch (dev->path.pnp.device) {
-		case SCH4037_KBC:
-			pc_keyboard_init(NO_AUX_DEVICE);
-			break;
-	}
-}
-
-static struct device_operations ops = {
-	.read_resources   = pnp_read_resources,
-	.set_resources    = pnp_set_resources,
-	.enable_resources = pnp_enable_resources,
-	.enable           = pnp_alt_enable,
-	.init             = sch4037_init,
-	.ops_pnp_mode     = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
-	{ NULL, SCH4037_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
-		0x7ff, 0x7ff, },
-};
-
-static void enable_dev(struct device *dev)
-{
-	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_smsc_sch4037_ops = {
-	CHIP_NAME("SMSC SCH4037 Super I/O")
-		.enable_dev = enable_dev,
-};