diff options
| author | Sukumar Ghorai <sukumar.ghorai@intel.com> | 2024-11-01 11:23:59 -0700 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-11-04 18:13:47 +0000 |
| commit | 4953648253598ff5ebeeaf38fa4f3a23fd8b0e97 (patch) | |
| tree | bf6ff361a054372461d65c419621d76c5efa99b2 /src/superio/smsc/mec1308/superio.c | |
| parent | dbe5ba8485be8808933cc38c0e207d93f543795a (diff) | |
mb/google/fatcat/var/fatcat: Configure eSPI alarm GPIO
This patch configures the ESPI_SOC_ALERT_L GPIO pad on fatcat as
NC to enable S0ix low power entry.
TEST=Build fatcat and check the platform boots without an issue.
Change-Id: Icb80a56177105c0281d05fe1f5daa87e6f7e291f
Signed-off-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84957
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Diffstat (limited to 'src/superio/smsc/mec1308/superio.c')
0 files changed, 0 insertions, 0 deletions