C and other Super I/O cosmetic fixes.

 - Random coding style, whitespace and cosmetic fixes.
 
 - Consistently use the same spacing and 4-hexdigit port number format
   in the pnp_dev_info[] arrays.
 
 - Drop dead/unused code and less useful comments.
 
 - Add missing "(C)" characters and copyright years.
 
 - Shorten and simplify some code snippets.
 
 - Use u8/u16/etc. everywhere.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

3 files changed, 54 insertions, 112 deletions

diff --git a/src/superio/smsc/lpc47n227/Makefile.inc b/src/superio/smsc/lpc47n227/Makefile.inc
index 22864f933c..01598138f1 100644
--- a/src/superio/smsc/lpc47n227/Makefile.inc
+++ b/src/superio/smsc/lpc47n227/Makefile.inc
@@ -18,3 +18,4 @@
 ##
 
 ramstage-$(CONFIG_SUPERIO_SMSC_LPC47N227) += superio.c
+
diff --git a/src/superio/smsc/lpc47n227/lpc47n227_early_serial.c b/src/superio/smsc/lpc47n227/lpc47n227_early_serial.c
index 318f0f3541..32bd3e3680 100644
--- a/src/superio/smsc/lpc47n227/lpc47n227_early_serial.c
+++ b/src/superio/smsc/lpc47n227/lpc47n227_early_serial.c
@@ -23,25 +23,15 @@
 #include <arch/romcc_io.h>
 #include "lpc47n227.h"
 
-/**
- * Enable access to the LPC47N227's configuration registers.
- *
- * @param dev High 8 bits = Super I/O port.
- */
-static inline void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(device_t dev)
 {
-	unsigned port = dev >> 8;
+	u16 port = dev >> 8;
 	outb(0x55, port);
 }
 
-/**
- * Disable access to the LPC47N227's configuration registers.
- *
- * @param dev High 8 bits = Super I/O port.
- */
 static void pnp_exit_conf_state(device_t dev)
 {
-	unsigned port = dev >> 8;
+	u16 port = dev >> 8;
 	outb(0xaa, port);
 }
 
@@ -51,24 +41,21 @@ static void pnp_exit_conf_state(device_t dev)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param iobase Base I/O port for the logical device.
  */
-void lpc47n227_pnp_set_iobase(device_t dev, unsigned iobase)
+void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase)
 {
-	// LPC47N227 requires base ports to be a multiple of 4
+	/* LPC47N227 requires base ports to be a multiple of 4. */
 	ASSERT(!(iobase & 0x3));
 
 	switch (dev & 0xFF) {
 	case LPC47N227_PP:
 		pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
 		break;
-
 	case LPC47N227_SP1:
 		pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
 		break;
-
 	case LPC47N227_SP2:
 		pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
 		break;
-
 	default:
 		break;
 	}
@@ -88,37 +75,29 @@ void lpc47n227_pnp_set_iobase(device_t dev, unsigned iobase)
  */
 void lpc47n227_pnp_set_enable(device_t dev, int enable)
 {
-	uint8_t power_register = 0;
-	uint8_t power_mask = 0;
-	uint8_t current_power;
-	uint8_t new_power;
+	u8 power_register = 0, power_mask = 0, current_power, new_power;
 
 	switch (dev & 0xFF) {
 	case LPC47N227_PP:
 		power_register = 0x01;
 		power_mask = 0x04;
 		break;
-
 	case LPC47N227_SP1:
 		power_register = 0x02;
 		power_mask = 0x08;
 		break;
-
 	case LPC47N227_SP2:
 		power_register = 0x02;
 		power_mask = 0x80;
 		break;
-
 	default:
 		return;
 	}
 
 	current_power = pnp_read_config(dev, power_register);
-	new_power = current_power & ~power_mask;	// disable by default
-
+	new_power = current_power & ~power_mask; /* Disable by default. */
 	if (enable)
-		new_power |= power_mask;	// Enable
-
+		new_power |= power_mask; /* Enable. */
 	pnp_write_config(dev, power_register, new_power);
 }
 
@@ -129,7 +108,7 @@ void lpc47n227_pnp_set_enable(device_t dev, int enable)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param iobase Processor I/O port address to assign to this serial device.
  */
-static void lpc47n227_enable_serial(device_t dev, unsigned iobase)
+static void lpc47n227_enable_serial(device_t dev, u16 iobase)
 {
 	/*
 	 * NOTE: Cannot use pnp_set_XXX() here because they assume chip
diff --git a/src/superio/smsc/lpc47n227/superio.c b/src/superio/smsc/lpc47n227/superio.c
index 5a994f7ca3..2a4ead9884 100644
--- a/src/superio/smsc/lpc47n227/superio.c
+++ b/src/superio/smsc/lpc47n227/superio.c
@@ -33,41 +33,38 @@
 #include "chip.h"
 #include "lpc47n227.h"
 
-// Forward declarations
+/* Forward declarations. */
 static void enable_dev(device_t dev);
 void lpc47n227_pnp_set_resources(device_t dev);
 void lpc47n227_pnp_enable_resources(device_t dev);
 void lpc47n227_pnp_enable(device_t dev);
 static void lpc47n227_init(device_t dev);
-
 static void lpc47n227_pnp_set_resource(device_t dev, struct resource *resource);
-void lpc47n227_pnp_set_iobase(device_t dev, unsigned iobase);
-void lpc47n227_pnp_set_drq(device_t dev, unsigned drq);
-void lpc47n227_pnp_set_irq(device_t dev, unsigned irq);
+void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase);
+void lpc47n227_pnp_set_drq(device_t dev, u8 drq);
+void lpc47n227_pnp_set_irq(device_t dev, u8 irq);
 void lpc47n227_pnp_set_enable(device_t dev, int enable);
-
 static void pnp_enter_conf_state(device_t dev);
 static void pnp_exit_conf_state(device_t dev);
 
 struct chip_operations superio_smsc_lpc47n227_ops = {
 	CHIP_NAME("SMSC LPC47N227 Super I/O")
-	    .enable_dev = enable_dev,
+	.enable_dev = enable_dev,
 };
 
 static struct device_operations ops = {
-	.read_resources = pnp_read_resources,
-	.set_resources = lpc47n227_pnp_set_resources,
+	.read_resources   = pnp_read_resources,
+	.set_resources    = lpc47n227_pnp_set_resources,
 	.enable_resources = lpc47n227_pnp_enable_resources,
-	.enable = lpc47n227_pnp_enable,
-	.init = lpc47n227_init,
+	.enable           = lpc47n227_pnp_enable,
+	.init             = lpc47n227_init,
 };
 
 static struct pnp_info pnp_dev_info[] = {
-	{&ops, LPC47N227_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
-	{&ops, LPC47N227_SP1, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
-	{&ops, LPC47N227_SP2, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
-	{&ops, LPC47N227_KBDC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0},
-	 {0x7f8, 0x4},}
+	{ &ops, LPC47N227_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+	{ &ops, LPC47N227_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+	{ &ops, LPC47N227_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+	{ &ops, LPC47N227_KBDC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
 };
 
 /**
@@ -86,6 +83,9 @@ static void enable_dev(device_t dev)
  * Configure the specified Super I/O device with the resources (I/O space,
  * etc.) that have been allocate for it.
  *
+ * NOTE: Cannot use pnp_set_resources() here because it assumes chip
+ * support for logical devices, which the LPC47N227 doesn't have.
+ * 
  * @param dev Pointer to structure describing a Super I/O device.
  */
 void lpc47n227_pnp_set_resources(device_t dev)
@@ -93,44 +93,30 @@ void lpc47n227_pnp_set_resources(device_t dev)
 	struct resource *res;
 
 	pnp_enter_conf_state(dev);
-
-	/*
-	 * NOTE: Cannot use pnp_set_resources() here because it assumes chip
-	 * support for logical devices, which the LPC47N227 doesn't have.
-	 */
 	for (res = dev->resource_list; res; res = res->next)
 		lpc47n227_pnp_set_resource(dev, res);
-
 	pnp_exit_conf_state(dev);
 }
 
+/*
+ * NOTE: Cannot use pnp_enable_resources() here because it assumes chip
+ * support for logical devices, which the LPC47N227 doesn't have.
+ */
 void lpc47n227_pnp_enable_resources(device_t dev)
 {
 	pnp_enter_conf_state(dev);
-
-	/*
-	 * NOTE: Cannot use pnp_enable_resources() here because it assumes chip
-	 * support for logical devices, which the LPC47N227 doesn't have.
-	 */
 	lpc47n227_pnp_set_enable(dev, 1);
-
 	pnp_exit_conf_state(dev);
 }
 
+/*
+ * NOTE: Cannot use pnp_set_enable() here because it assumes chip
+ * support for logical devices, which the LPC47N227 doesn't have.
+ */
 void lpc47n227_pnp_enable(device_t dev)
 {
 	pnp_enter_conf_state(dev);
-
-	/*
-	 * NOTE: Cannot use pnp_set_enable() here because it assumes chip
-	 * support for logical devices, which the LPC47N227 doesn't have.
-	 */
-	if (dev->enabled) {
-		lpc47n227_pnp_set_enable(dev, 1);
-	} else {
-		lpc47n227_pnp_set_enable(dev, 0);
-	}
-
+	lpc47n227_pnp_set_enable(dev, (dev->enabled) ? 1 : 0);
 	pnp_exit_conf_state(dev);
 }
 
@@ -155,12 +141,10 @@ static void lpc47n227_init(device_t dev)
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com1);
 		break;
-
 	case LPC47N227_SP2:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com2);
 		break;
-
 	case LPC47N227_KBDC:
 		printk(BIOS_DEBUG, "LPC47N227: Initializing keyboard.\n");
 		pc_keyboard_init(&conf->keyboard);
@@ -172,11 +156,11 @@ static void lpc47n227_pnp_set_resource(device_t dev, struct resource *resource)
 {
 	if (!(resource->flags & IORESOURCE_ASSIGNED)) {
 		printk(BIOS_ERR, "ERROR: %s %02lx not allocated\n",
-			   dev_path(dev), resource->index);
+		       dev_path(dev), resource->index);
 		return;
 	}
 
-	/* Now store the resource */
+	/* Now store the resource. */
 	/*
 	 * NOTE: Cannot use pnp_set_XXX() here because they assume chip
 	 * support for logical devices, which the LPC47N227 doesn't have.
@@ -189,7 +173,7 @@ static void lpc47n227_pnp_set_resource(device_t dev, struct resource *resource)
 		lpc47n227_pnp_set_irq(dev, resource->base);
 	} else {
 		printk(BIOS_ERR, "ERROR: %s %02lx unknown resource type\n",
-			   dev_path(dev), resource->index);
+		       dev_path(dev), resource->index);
 		return;
 	}
 	resource->flags |= IORESOURCE_STORED;
@@ -197,7 +181,7 @@ static void lpc47n227_pnp_set_resource(device_t dev, struct resource *resource)
 	report_resource_stored(dev, resource, "");
 }
 
-void lpc47n227_pnp_set_iobase(device_t dev, unsigned iobase)
+void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase)
 {
 	ASSERT(!(iobase & 0x3));
 
@@ -205,33 +189,29 @@ void lpc47n227_pnp_set_iobase(device_t dev, unsigned iobase)
 	case LPC47N227_PP:
 		pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
 		break;
-
 	case LPC47N227_SP1:
 		pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
 		break;
-
 	case LPC47N227_SP2:
 		pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
 		break;
-
 	case LPC47N227_KBDC:
 		break;
-
 	default:
 		BUG();
 		break;
 	}
 }
 
-void lpc47n227_pnp_set_drq(device_t dev, unsigned drq)
+void lpc47n227_pnp_set_drq(device_t dev, u8 drq)
 {
-	if (dev->path.pnp.device == LPC47N227_PP) {
-		const uint8_t PP_DMA_MASK = 0x0F;
-		const uint8_t PP_DMA_SELECTION_REGISTER = 0x26;
-		uint8_t current_config =
-		    pnp_read_config(dev, PP_DMA_SELECTION_REGISTER);
-		uint8_t new_config;
+	const u8 PP_DMA_MASK = 0x0F;
+	const u8 PP_DMA_SELECTION_REGISTER = 0x26;
+	u8 current_config, new_config;
 
+	if (dev->path.pnp.device == LPC47N227_PP) {
+		current_config = pnp_read_config(dev,
+						 PP_DMA_SELECTION_REGISTER);
 		ASSERT(!(drq & ~PP_DMA_MASK));	// DRQ out of range??
 		new_config = (current_config & ~PP_DMA_MASK) | drq;
 		pnp_write_config(dev, PP_DMA_SELECTION_REGISTER, new_config);
@@ -240,33 +220,27 @@ void lpc47n227_pnp_set_drq(device_t dev, unsigned drq)
 	}
 }
 
-void lpc47n227_pnp_set_irq(device_t dev, unsigned irq)
+void lpc47n227_pnp_set_irq(device_t dev, u8 irq)
 {
-	uint8_t irq_config_register = 0;
-	uint8_t irq_config_mask = 0;
-	uint8_t current_config;
-	uint8_t new_config;
+	u8 irq_config_register = 0, irq_config_mask = 0;
+	u8 current_config, new_config;
 
 	switch (dev->path.pnp.device) {
 	case LPC47N227_PP:
 		irq_config_register = 0x27;
 		irq_config_mask = 0x0F;
 		break;
-
 	case LPC47N227_SP1:
 		irq_config_register = 0x28;
 		irq_config_mask = 0xF0;
 		irq <<= 4;
 		break;
-
 	case LPC47N227_SP2:
 		irq_config_register = 0x28;
 		irq_config_mask = 0x0F;
 		break;
-
 	case LPC47N227_KBDC:
 		break;
-
 	default:
 		BUG();
 		return;
@@ -279,58 +253,46 @@ void lpc47n227_pnp_set_irq(device_t dev, unsigned irq)
 
 void lpc47n227_pnp_set_enable(device_t dev, int enable)
 {
-	uint8_t power_register = 0;
-	uint8_t power_mask = 0;
-	uint8_t current_power;
-	uint8_t new_power;
+	u8 power_register = 0, power_mask = 0, current_power, new_power;
 
 	switch (dev->path.pnp.device) {
 	case LPC47N227_PP:
 		power_register = 0x01;
 		power_mask = 0x04;
 		break;
-
 	case LPC47N227_SP1:
 		power_register = 0x02;
 		power_mask = 0x08;
 		break;
-
 	case LPC47N227_SP2:
 		power_register = 0x02;
 		power_mask = 0x80;
 		break;
-
 	case LPC47N227_KBDC:
 		break;
-
 	default:
 		BUG();
 		return;
 	}
 
 	current_power = pnp_read_config(dev, power_register);
-	new_power = current_power & ~power_mask;	// disable by default
-
+	new_power = current_power & ~power_mask; /* Disable by default. */
 	if (enable) {
-		struct resource *ioport_resource =
-		    find_resource(dev, PNP_IDX_IO0);
+		struct resource *ioport_resource;
+		ioport_resource = find_resource(dev, PNP_IDX_IO0);
 		lpc47n227_pnp_set_iobase(dev, ioport_resource->base);
-
-		new_power |= power_mask;	// Enable
-
+		new_power |= power_mask; /* Enable. */
 	} else {
 		lpc47n227_pnp_set_iobase(dev, 0);
 	}
 	pnp_write_config(dev, power_register, new_power);
 }
 
-/** Enable access to the LPC47N227's configuration registers. */
 static void pnp_enter_conf_state(device_t dev)
 {
 	outb(0x55, dev->path.pnp.port);
 }
 
-/** Disable access to the LPC47N227's configuration registers. */
 static void pnp_exit_conf_state(device_t dev)
 {
 	outb(0xaa, dev->path.pnp.port);