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| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2020-09-08 09:48:45 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-21 08:08:26 +0000 |
| commit | 22bf6fbcba54eedf8623a3141aad49bb82ba4add (patch) | |
| tree | 0f13bdef7b00a5867f7af985dab99686ae9e0c00 /src/superio/smsc/lpc47n227/lpc47n227.h | |
| parent | 0a6f82835ecbc43b43ff8645f049eee2844a4d85 (diff) | |
mb/51nb/x210/gpio: 1/4 Decode raw register values
Use the intelp2m utility [1,2] with -fld=cb options to convert the pad
configuration format with the raw values of the DW0 and DW1 registers
to the format with the bit fields macros: PAD_FUNC(), PAD_RESET(),
PAD_TRIG(), PAD_BUF(), PAD_PULL(), etc...
./intelp2m -fld cb -t 1 -file ../../src/mainboard/51nb/x210/gpio.h
This is part of the patch set
"mb/51nb/x210/gpio: Rewrite pad config using intelp2m":
CB:43566 - 1/4 Decode raw register values
CB:43567 - 2/4 Exclude fields for PAD_CFG
CB:43568 - 3/4 Fixes PAD_RESET to convert to PAD_NC()
CB:43410 - 4/4 Convert field macros to PAD_CFG
Tested with BUILD_TIMELESS=1, 51NB-X210, remains identical.
[1] https://github.com/maxpoliak/pch-pads-parser
[2] https://review.coreboot.org/c/coreboot/+/35643
Change-Id: I19282c985cf35a9f99be449915aa9bab7e03472d
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43566
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/superio/smsc/lpc47n227/lpc47n227.h')
0 files changed, 0 insertions, 0 deletions