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authorHung-Te Lin <hungte@chromium.org>2013-06-26 20:29:06 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 23:17:39 +0200
commit864420766ad85c8ed0dd98aefd8f527aeb506aa5 (patch)
tree7ea24b882fa020fbf83a4e933d9e28f702d8a5bc /src/superio/smsc/lpc47m15x
parentcab3621446542fadf67e9406c4ae39fb63a0536f (diff)
armv7/exynos5420: Add output ability and half-duplex mode in SPI driver.
The SPI driver (exynos_spi_rx_tx) was implemented with only "read" ability and only full-duplex mode. To communicate with devices like ChromeOS EC, we need both output (tx) and half-duplex (searching frame header) features. This commit adds a spi_rx_tx that can handle all cases we need. Change-Id: I6aba3839eb0711d49c143dc0620245c0dfe782d8 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3713 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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