C and other Super I/O cosmetic fixes.

 - Random coding style, whitespace and cosmetic fixes.
 
 - Consistently use the same spacing and 4-hexdigit port number format
   in the pnp_dev_info[] arrays.
 
 - Drop dead/unused code and less useful comments.
 
 - Add missing "(C)" characters and copyright years.
 
 - Shorten and simplify some code snippets.
 
 - Use u8/u16/etc. everywhere.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

3 files changed, 25 insertions, 35 deletions

diff --git a/src/superio/smsc/lpc47b272/Makefile.inc b/src/superio/smsc/lpc47b272/Makefile.inc
index e3ca5f29b9..c688f024d7 100644
--- a/src/superio/smsc/lpc47b272/Makefile.inc
+++ b/src/superio/smsc/lpc47b272/Makefile.inc
@@ -18,5 +18,5 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-#config chip.h
 ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.c
+
diff --git a/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c b/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c
index 0c31b3a935..75093ea0a9 100644
--- a/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c
+++ b/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c
@@ -23,17 +23,15 @@
 #include <arch/romcc_io.h>
 #include "lpc47b272.h"
 
-/** Enable access to the LPC47B272's configuration registers. */
-static inline void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(device_t dev)
 {
-	unsigned port = dev>>8;
+	u16 port = dev >> 8;
 	outb(0x55, port);
 }
 
-/** Disable access to the LPC47B272's configuration registers. */
 static void pnp_exit_conf_state(device_t dev)
 {
-	unsigned port = dev>>8;
+	u16 port = dev >> 8;
 	outb(0xaa, port);
 }
 
@@ -44,7 +42,7 @@ static void pnp_exit_conf_state(device_t dev)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param iobase Processor I/O port address to assign to this serial device.
  */
-static void lpc47b272_enable_serial(device_t dev, unsigned iobase)
+static void lpc47b272_enable_serial(device_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c
index 7fd1a9d8e1..5bf385c7fb 100644
--- a/src/superio/smsc/lpc47b272/superio.c
+++ b/src/superio/smsc/lpc47b272/superio.c
@@ -45,7 +45,7 @@ static void lpc47b272_init(device_t dev);
 
 static void pnp_enter_conf_state(device_t dev);
 static void pnp_exit_conf_state(device_t dev);
-//static void dump_pnp_device(device_t dev);
+// static void dump_pnp_device(device_t dev);
 
 struct chip_operations superio_smsc_lpc47b272_ops = {
 	CHIP_NAME("SMSC LPC47B272 Super I/O")
@@ -61,12 +61,12 @@ static struct device_operations ops = {
 };
 
 static struct pnp_info pnp_dev_info[] = {
-	{ &ops, LPC47B272_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-	{ &ops, LPC47B272_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-	{ &ops, LPC47B272_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-	{ &ops, LPC47B272_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-	{ &ops, LPC47B272_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
-	{ &ops, LPC47B272_RT,   PNP_IO0, { 0x780, 0 }, },
+	{ &ops, LPC47B272_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+	{ &ops, LPC47B272_PP,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+	{ &ops, LPC47B272_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+	{ &ops, LPC47B272_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+	{ &ops, LPC47B272_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
+	{ &ops, LPC47B272_RT,  PNP_IO0, {0x0780, 0}, },
 };
 
 /**
@@ -105,13 +105,7 @@ static void lpc47b272_pnp_enable(device_t dev)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
-
-	if(dev->enabled) {
-		pnp_set_enable(dev, 1);
-	}
-	else {
-		pnp_set_enable(dev, 0);
-	}
+	pnp_set_enable(dev, (dev->enabled) ? 1 : 0);
 	pnp_exit_conf_state(dev);
 }
 
@@ -136,25 +130,21 @@ static void lpc47b272_init(device_t dev)
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com1);
 		break;
-
 	case LPC47B272_SP2:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com2);
 		break;
-
 	case LPC47B272_KBC:
 		pc_keyboard_init(&conf->keyboard);
 		break;
 	}
 }
 
-/** Enable access to the LPC47B272's configuration registers. */
 static void pnp_enter_conf_state(device_t dev)
 {
 	outb(0x55, dev->path.pnp.port);
 }
 
-/** Disable access to the LPC47B272's configuration registers. */
 static void pnp_exit_conf_state(device_t dev)
 {
 	outb(0xaa, dev->path.pnp.port);
@@ -170,28 +160,30 @@ static void pnp_exit_conf_state(device_t dev)
  */
 static void dump_pnp_device(device_t dev)
 {
-	int register_index;
+	int i;
 	print_debug("\n");
 
-	for(register_index = 0; register_index <= LPC47B272_MAX_CONFIG_REGISTER; register_index++) {
-		uint8_t register_value;
+	for (i = 0; i <= LPC47B272_MAX_CONFIG_REGISTER; i++) {
+		u8 register_value;
 
-		if ((register_index & 0x0f) == 0) {
-			print_debug_hex8(register_index);
+		if ((i & 0x0f) == 0) {
+			print_debug_hex8(i);
 			print_debug_char(':');
 		}
 
-		/* Skip over 'register' that would cause exit from configuration mode */
-		if (register_index == 0xaa)
+		/*
+		 * Skip over 'register' that would cause exit from
+		 * configuration mode.
+		 */
+		if (i == 0xaa)
 			register_value = 0xaa;
 		else
-			register_value = pnp_read_config(dev, register_index);
+			register_value = pnp_read_config(dev, i);
 
 		print_debug_char(' ');
 		print_debug_hex8(register_value);
-		if ((register_index & 0x0f) == 0x0f) {
+		if ((i & 0x0f) == 0x0f)
 			print_debug("\n");
-		}
 	}
 
    	print_debug("\n");