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authorMichał Żygowski <michal.zygowski@3mdeb.com>2024-08-01 11:37:24 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-10-02 19:45:05 +0000
commiteee5c10c945c519710670da6bed84f612e330a98 (patch)
tree1f6158e1ea24053b5b200bf9ab023300640ded2c /src/superio/smsc/fdc37n972/fdc37n972.h
parentb90fac1cfe2fc858e60b6875752ea9dc69b72850 (diff)
soc/intel/cannonlake,skylake: Fix locking SMRAM
Intel TXT SINIT required the D_LCK bit set. Although coreboot tries to set it, the bit ws still clear. The D_LCK bit has to be set using I/O CF8/CFC cycle. TEST=Boot Linux with tboot on Protectli VP4670 with Intel TXT enabled Change-Id: I03aff482b53ab7b0bcaccf18e47ad4c22b53583c Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83728 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: coreboot org <coreboot.org@gmail.com>
Diffstat (limited to 'src/superio/smsc/fdc37n972/fdc37n972.h')
0 files changed, 0 insertions, 0 deletions