diff options
author | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2015-07-12 11:49:16 -0500 |
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committer | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2015-07-13 17:11:00 +0200 |
commit | 260a01f2cb025bcac6e4670be00ea29b95e53174 (patch) | |
tree | 35a628a1a465df2bcad2c8765d2b68551aecb77e /src/superio/smsc/dme1737 | |
parent | 8964717c4d9a7d0d74caa80f0147858adf87dea2 (diff) |
superio/smsc: Add support for SMSC DME1737
Change-Id: If2ba9ca48c809fe4f7dc0595a3cb3df168d630fd
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/10893
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/superio/smsc/dme1737')
-rw-r--r-- | src/superio/smsc/dme1737/Makefile.inc | 4 | ||||
-rw-r--r-- | src/superio/smsc/dme1737/dme1737.h | 21 | ||||
-rw-r--r-- | src/superio/smsc/dme1737/early_serial.c | 4 | ||||
-rw-r--r-- | src/superio/smsc/dme1737/superio.c | 112 |
4 files changed, 27 insertions, 114 deletions
diff --git a/src/superio/smsc/dme1737/Makefile.inc b/src/superio/smsc/dme1737/Makefile.inc index 5e359d7981..fcd8ff19b3 100644 --- a/src/superio/smsc/dme1737/Makefile.inc +++ b/src/superio/smsc/dme1737/Makefile.inc @@ -20,5 +20,5 @@ ## Foundation, Inc. ## -romstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += early_serial.c -ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += superio.c +romstage-$(CONFIG_SUPERIO_SMSC_DME1737) += early_serial.c +ramstage-$(CONFIG_SUPERIO_SMSC_DME1737) += superio.c diff --git a/src/superio/smsc/dme1737/dme1737.h b/src/superio/smsc/dme1737/dme1737.h index bc70ba9491..ee2d43dad2 100644 --- a/src/superio/smsc/dme1737/dme1737.h +++ b/src/superio/smsc/dme1737/dme1737.h @@ -20,20 +20,19 @@ * Foundation, Inc. */ -#ifndef SUPERIO_SMSC_LPC47B397_H -#define SUPERIO_SMSC_LPC47B397_H +#ifndef SUPERIO_SMSC_DME1737_H +#define SUPERIO_SMSC_DME1737_H -#define LPC47B397_FDC 0 /* Floppy */ -#define LPC47B397_PP 3 /* Parallel Port */ -#define LPC47B397_SP1 4 /* Com1 */ -#define LPC47B397_SP2 5 /* Com2 */ -#define LPC47B397_KBC 7 /* Keyboard & Mouse */ -#define LPC47B397_HWM 8 /* HW Monitor */ -#define LPC47B397_RT 10 /* Runtime reg*/ +#define DME1737_FDC 0 /* Floppy */ +#define DME1737_PP 3 /* Parallel Port */ +#define DME1737_SP1 4 /* Com1 */ +#define DME1737_SP2 5 /* Com2 */ +#define DME1737_KBC 7 /* Keyboard & Mouse */ +#define DME1737_RT 10 /* Runtime reg*/ #include <arch/io.h> #include <stdint.h> -void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase); +void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase); -#endif /* SUPERIO_SMSC_LPC47B397_H */ +#endif /* SUPERIO_SMSC_DME1737_H */ diff --git a/src/superio/smsc/dme1737/early_serial.c b/src/superio/smsc/dme1737/early_serial.c index f5b321e489..d2d4764e72 100644 --- a/src/superio/smsc/dme1737/early_serial.c +++ b/src/superio/smsc/dme1737/early_serial.c @@ -23,7 +23,7 @@ #include <arch/io.h> #include <device/pnp.h> #include <stdint.h> -#include "lpc47b397.h" +#include "dme1737.h" static void pnp_enter_conf_state(pnp_devfn_t dev) { @@ -37,7 +37,7 @@ static void pnp_exit_conf_state(pnp_devfn_t dev) outb(0xaa, port); } -void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase) +void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/smsc/dme1737/superio.c b/src/superio/smsc/dme1737/superio.c index a9a80926cb..528f71dafa 100644 --- a/src/superio/smsc/dme1737/superio.c +++ b/src/superio/smsc/dme1737/superio.c @@ -29,123 +29,37 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "lpc47b397.h" +#include "dme1737.h" -static void enable_hwm_smbus(struct device *dev) -{ - /* Enable SensorBus register access. */ - u8 reg8; - - reg8 = pnp_read_config(dev, 0xf0); - reg8 |= (1 << 1); - pnp_write_config(dev, 0xf0, reg8); -} - -static void lpc47b397_init(struct device *dev) +static void dme1737_init(struct device *dev) { if (!dev->enabled) return; switch(dev->path.pnp.device) { - case LPC47B397_KBC: + case DME1737_KBC: pc_keyboard_init(); break; } } -static void lpc47b397_pnp_enable_resources(struct device *dev) -{ - pnp_enable_resources(dev); - - pnp_enter_conf_mode(dev); - switch(dev->path.pnp.device) { - case LPC47B397_HWM: - printk(BIOS_DEBUG, "LPC47B397 SensorBus register access enabled\n"); - pnp_set_logical_device(dev); - enable_hwm_smbus(dev); - break; - } - /* dump_pnp_device(dev); */ - pnp_exit_conf_mode(dev); -} - static struct device_operations ops = { .read_resources = pnp_read_resources, .set_resources = pnp_set_resources, - .enable_resources = lpc47b397_pnp_enable_resources, - .enable = pnp_alt_enable, - .init = lpc47b397_init, - .ops_pnp_mode = &pnp_conf_mode_55_aa, -}; - -#define HWM_INDEX 0 -#define HWM_DATA 1 -#define SB_INDEX 0x0b -#define SB_DATA0 0x0c -#define SB_DATA1 0x0d -#define SB_DATA2 0x0e -#define SB_DATA3 0x0f - -static int lsmbus_read_byte(struct device *dev, u8 address) -{ - unsigned int device; - struct resource *res; - int result; - - device = dev->path.i2c.device; - - res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0); - - pnp_write_index(res->base + HWM_INDEX, 0, device); /* Why 0? */ - - /* We only read it one byte one time. */ - result = pnp_read_index(res->base + SB_INDEX, address); - - return result; -} - -static int lsmbus_write_byte(struct device *dev, u8 address, u8 val) -{ - unsigned int device; - struct resource *res; - - device = dev->path.i2c.device; - res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0); - - pnp_write_index(res->base+HWM_INDEX, 0, device); /* Why 0? */ - - /* We only write it one byte one time. */ - pnp_write_index(res->base+SB_INDEX, address, val); - - return 0; -} - -static struct smbus_bus_operations lops_smbus_bus = { - /* .recv_byte = lsmbus_recv_byte, */ - /* .send_byte = lsmbus_send_byte, */ - .read_byte = lsmbus_read_byte, - .write_byte = lsmbus_write_byte, -}; - -static struct device_operations ops_hwm = { - .read_resources = pnp_read_resources, - .set_resources = pnp_set_resources, - .enable_resources = lpc47b397_pnp_enable_resources, + .enable_resources = pnp_enable_resources, .enable = pnp_alt_enable, - .init = lpc47b397_init, - .ops_smbus_bus = &lops_smbus_bus, + .init = dme1737_init, .ops_pnp_mode = &pnp_conf_mode_55_aa, }; static struct pnp_info pnp_dev_info[] = { - { &ops, LPC47B397_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, - { &ops, LPC47B397_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, - { &ops, LPC47B397_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, - { &ops, LPC47B397_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, - { &ops, LPC47B397_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, }, - { &ops_hwm, LPC47B397_HWM, PNP_IO0, {0x07f0, 0}, }, - { &ops, LPC47B397_RT, PNP_IO0, {0x0780, 0}, }, + { &ops, DME1737_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, + { &ops, DME1737_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, + { &ops, DME1737_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, DME1737_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, DME1737_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, }, + { &ops, DME1737_RT, PNP_IO0, {0x0780, 0}, }, }; static void enable_dev(struct device *dev) @@ -154,7 +68,7 @@ static void enable_dev(struct device *dev) ARRAY_SIZE(pnp_dev_info), pnp_dev_info); } -struct chip_operations superio_smsc_lpc47b397_ops = { - CHIP_NAME("SMSC LPC47B397 Super I/O") +struct chip_operations superio_smsc_dme1737_ops = { + CHIP_NAME("SMSC DME1737 Super I/O") .enable_dev = enable_dev, }; |