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author | Nico Huber <nico.huber@secunet.com> | 2012-06-14 13:27:39 +0200 |
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committer | Nico Huber <nico.huber@secunet.com> | 2012-06-21 11:53:25 +0200 |
commit | 3ca35cae354305003bcc5d14549a247247726e61 (patch) | |
tree | f63a68222c85d7cf15fcf85e24fecf8909e2db7e /src/superio/renesas/m3885x/chip.h | |
parent | 0d120f8ee25cfeb0c87024aff8c1f81d0b64bbb4 (diff) |
libpayload: Add dummy queue heads to EHCI interrupt frame list
This introduces a dummy queue head in the interrupt frame list of the
EHCI host controller. It's a workaround for broken controllers which
follow pointers from this list even if the terminate bit is set.
Fortunately, they do honor the bit in queue heads and having an empty
QH in the list doesn't violate the standard.
The linux kernel has a similar workaround for AMD SB700, SB800, and
Hudson-2/3 platforms. We observed this bug with an AMD SB600.
Change-Id: Ibbb66dea5fddc89c7995a24d746bedf6bfa887be
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1124
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/superio/renesas/m3885x/chip.h')
0 files changed, 0 insertions, 0 deletions