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authorYork Yang <york.yang@intel.com>2015-10-19 13:35:21 -0700
committerMartin Roth <martinroth@google.com>2015-11-16 17:43:18 +0100
commit72e33a75cb68de1048d8b12f296de1be4cb08c9b (patch)
tree663047551d6a70303639db3a56e84788cbfa032d /src/superio/nuvoton/nct6779d/superio.c
parentf41ad02c83b66e72d68801413a15cf869bc97268 (diff)
intel/fsp_baytrail: Load APs microcode in baytrail_init_cpus
Load microcode to APs when performing baytrail_init_cpus. The updated fsp1_0 driver calls TempRamInit API with a dummy microcode, so FSP will not handle the microcode load. Change-Id: I7b7c0f43da0d149048ae5a8fd547828f42de04fd Signed-off-by: York Yang <york.yang@intel.com> Reviewed-on: http://review.coreboot.org/12095 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/superio/nuvoton/nct6779d/superio.c')
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