diff options
| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-04-08 17:12:13 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-08 15:31:44 +0000 |
| commit | 02db6b40499a1c970f32074bcff5b7b65bec4fa3 (patch) | |
| tree | 4c6515666eba656aea1109858e8ec7daf0fffc83 /src/superio/nuvoton/nct6687d/superio.c | |
| parent | bb1a0e82d7923d93ad296f95f33269a56a01fb1f (diff) | |
mb/msi/ms7d25: Add correct memory init configuration
Tested with 4x KINGSTON KF3600C17D4/8GX DIMMs.
TEST=Include the microcode from vendor firmware and FSP blob from
Intel R&DC. Boot the platform and see ramstage is executing.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I98b9c77d791d18640cb05c133cb0bf14ad22dcdb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63503
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Diffstat (limited to 'src/superio/nuvoton/nct6687d/superio.c')
0 files changed, 0 insertions, 0 deletions