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authorPiotr Kleinschmidt <piotr.kleinschmidt@3mdeb.com>2019-09-19 16:25:56 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-01-15 18:54:33 +0000
commitb52f7c7c468e0456a126b88a84f6568b873a5ae0 (patch)
tree001df03a41ea9ca2f7b23a66bba9283e00c1cc06 /src/superio/nuvoton/nct5104d/nct5104d.h
parentbd467d1481baabd0c9651dfa02a46f324679bf10 (diff)
superio/nuvoton/nct5104d: Add soft reset GPIO functionality
So far, only hard power off could reset GPIOs state to defaults: IN, Open-drain. Now, defaults are set with every boot to ensure that GPIOs are not in unknown/unwanted state. Change-Id: I67878dbab2ddf0deaaa8f5d79416368c6164ba1d Signed-off-by: Piotr Kleinschmidt <piotr.kleinschmidt@3mdeb.com> Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35482 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/superio/nuvoton/nct5104d/nct5104d.h')
-rw-r--r--src/superio/nuvoton/nct5104d/nct5104d.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/superio/nuvoton/nct5104d/nct5104d.h b/src/superio/nuvoton/nct5104d/nct5104d.h
index 707e94a90f..9a881059c0 100644
--- a/src/superio/nuvoton/nct5104d/nct5104d.h
+++ b/src/superio/nuvoton/nct5104d/nct5104d.h
@@ -26,6 +26,16 @@
#define GLOBAL_OPTION_CR26 0x26
#define CR26_LOCK_REG (1 << 4) /* required to access CR10/CR11 */
+/* LDN 0x07 specific registers */
+#define NCT5104D_GPIO0_IO 0xE0
+#define NCT5104D_GPIO1_IO 0xE4
+#define NCT5104D_GPIO6_IO 0xF8
+
+/* LDN 0x0F specific registers */
+#define NCT5104D_GPIO0_PP_OD 0xE0
+#define NCT5104D_GPIO1_PP_OD 0xE1
+#define NCT5104D_GPIO6_PP_OD 0xE6
+
/* Logical Device Numbers (LDN). */
#define NCT5104D_FDC 0x00 /* FDC - not pinned out */
#define NCT5104D_SP1 0x02 /* UARTA */