cpu/intel/microcode: Defer microcode patching until after DRAM init

Follows Intel SoC recommendation to avoid potential cache contention
issues during early (pre-DRAM) microcode loading.

Source: MTL_ARL_Processor_Family_BiosSpec_Rev1p0
Document Number: 729384

BUG=b:330536271
TEST=Able to boot to ChromeOS.

w/o this patch:

[DEBUG]  microcode: sig=0xa06a4 pf=0x80 revision=0x19
[INFO ]  CBFS: Found 'cpu_microcode_a06a4.bin' @0x1d9c0 size 0x21400
    in mcache @0xfef89680
[INFO ]  VB2:vb2_digest_init() 136192 bytes, hash algo 2, HW
    acceleration enabled
[INFO ]  microcode: load microcode patch
[ERROR]  microcode: Update failed

w/ this patch:

[ERROR]  Microcode Error: Early microcode patching is not supported due
    to NEM limitation

Change-Id: I1e433f5bede036800b27900b4b13a399b4f45d6f
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81954
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

0 files changed, 0 insertions, 0 deletions