google/veyron*: change .ddrconfig from 14 to 3

There are two configs, sdram-lpddr3-hynix-2GB.inc and
sdram-lpddr3-samsung-2GB-24EB.inc that use .ddrconfig = 14.

Changing .ddrconfig from 14 to 3 improves performance
especially on contiguous memory accesses. Comparing the .ddrconfig:
 - if .ddrconfig = 3,
   C RDRR RRRR RRRR RRRR RBBB CCCC CCCC C---
 - if .ddrconfig = 14,
   C DRBB BRRR RRRR RRRR RRRR CCCC CCCC C---
where
 - R: indicates Row bits
 - B: indicates Bank bits
 - C: indicates Column bits
 - D: indicates Chip selects bits

.ddrconfig = 3 has multiple banks switching which improves DDR timing.

BUG=chrome-os-partner:57321
TEST=Boot from fievel and play video
BRANCH=veyron

Change-Id: Ifdcedc28e84429b8b79c7553b38b667631d29c09
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 93882e4f2000d93c9dae5e6d4b2e1f4b7bc9489e
Original-Change-Id: Ic98ebae48609a7604ec678b6bd14dd2b29b669c4
Original-Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/404691
Original-Commit-Ready: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Tested-by: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/17210
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>

0 files changed, 0 insertions, 0 deletions