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authorTeo Boon Tiong <boon.tiong.teo@intel.com>2016-09-05 16:00:07 +0800
committerMartin Roth <martinroth@google.com>2016-10-01 22:29:18 +0200
commitf95daa510d6c344199be3309afb86e8030521d05 (patch)
tree01b6d869e73cb55463dd0bb379b72886534b64b1 /src/superio/nuvoton/common/early_serial.c
parent3674c8240d89f030ed017e5c13298cb6a68ddd48 (diff)
superio/nuvoton: Add back Nuvoton NCT6776 support
Revert commit 53552cc0 (Drop SuperIO nuvoton/nct6776), removing the code as no other mainboard uses it. The board Intel Saddle Brook uses this device, so add the code back with minor adaptations. Change-Id: I546879285ad8336e81798d0fbdf94f72e1fa61a2 Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com> Reviewed-on: https://review.coreboot.org/16519 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/superio/nuvoton/common/early_serial.c')
-rw-r--r--src/superio/nuvoton/common/early_serial.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c
index fca5ed6e1e..d1958a0431 100644
--- a/src/superio/nuvoton/common/early_serial.c
+++ b/src/superio/nuvoton/common/early_serial.c
@@ -63,6 +63,9 @@ static void pnp_exit_conf_state(pnp_devfn_t dev)
void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase)
{
pnp_enter_conf_state(dev);
+ if (IS_ENABLED(CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A))
+ /* Route GPIO8 pin group to COM A */
+ pnp_write_config(dev, 0x2a, 0x40);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);