diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2013-06-26 18:11:23 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-12-12 22:02:42 +0100 |
| commit | d6ff9e7deb0680b7d54958377834bc3c7606ba0c (patch) | |
| tree | 9e879ac5d9545b515964ced507203b22e22aff49 /src/superio/nsc/pc97317 | |
| parent | ccb12fbb58c13af46e2275fd50cd8b171fdd169a (diff) | |
peppy: RAM_ID + storage changes for next build.
- Update RAM_ID table.
- Add DEVSLP0 signal to NGFF SATA port.
Note: After this change, old Micron 2GB boards will no longer boot.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Id68a1d6ace2702cca9c37305726cd55a0bde5005
Reviewed-on: https://gerrit.chromium.org/gerrit/60167
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
Reviewed-on: http://review.coreboot.org/4340
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/superio/nsc/pc97317')
0 files changed, 0 insertions, 0 deletions