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authorSven Schnelle <svens@stackframe.org>2011-02-05 12:26:07 +0000
committerPeter Stuge <peter@stuge.se>2011-02-05 12:26:07 +0000
commit82e3617e8cdc4b035c6154f76bef1e3a4a79ab1c (patch)
treee0ec373d2213ec8cb655aa69883d34f5e47b9509 /src/superio/nsc/pc87392/pc87392.h
parent92cf08c8f39869b619bd1129230df9e5174ba3f5 (diff)
Add PC87392 support
This adds support for the NSC PC87392 Super I/O. It is used in Lenovo Docking Stations as Super I/O chip. v2 because of: - skip some empty files - missing newlines in Kconfig and Makefile.inc - add the Kconfig option in sorted order Thanks to idwer on irc for pointing that out. Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6333 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/nsc/pc87392/pc87392.h')
-rw-r--r--src/superio/nsc/pc87392/pc87392.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/src/superio/nsc/pc87392/pc87392.h b/src/superio/nsc/pc87392/pc87392.h
new file mode 100644
index 0000000000..759f109622
--- /dev/null
+++ b/src/superio/nsc/pc87392/pc87392.h
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SUPERIO_NSC_PC87392_H
+#define SUPERIO_NSC_PC87392_H
+
+#define PC87392_FDC 0x00
+#define PC87392_PP 0x01
+#define PC87392_SP2 0x02
+#define PC87392_SP1 0x03
+#define PC87392_GPIO 0x07
+#define PC87392_WDT 0x0A
+
+#endif