diff options
author | Duncan Laurie <dlaurie@google.com> | 2018-12-10 11:29:36 -0800 |
---|---|---|
committer | Duncan Laurie <dlaurie@chromium.org> | 2019-02-01 21:56:07 +0000 |
commit | 718d185f1e041411a3a42862bf83c79b6e51fb36 (patch) | |
tree | 31080e7983d63b3a01da1c672043af52bcbbeae1 /src/superio/nsc/pc87309 | |
parent | c01a505282526a7038463e937cbec83f704a6a89 (diff) |
vendorcode/google/chromeos: Use ACPI GPIO pin when possible
Have the generated Chrome OS ACPI GPIO table provide the ACPI GPIO
pin number instead of the raw GPIO number when possible.
This is necessary if the OS uses a different numbering for GPIOs
that are reported in ACPI than the actual underlying GPIO number.
For example, if the SOC OS driver declares more pins in an ACPI GPIO
bank than there are actual pins in the hardware it will have gaps in
the number space.
This is a reworked version of 6217e9beff16d805ca833e79a2931bcdb3d02a44
which does not try to convert CROS_GPIO_VIRTUAL.
BUG=b:120686247
TEST=pass firmware_WriteProtect test on Sarien
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: I3ad5099b7f2f871c7e516988f60a54eb2a75bef7
Reviewed-on: https://review.coreboot.org/c/31080
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/superio/nsc/pc87309')
0 files changed, 0 insertions, 0 deletions