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author | David Hendricks <dhendrix@chromium.org> | 2014-11-03 17:42:09 -0800 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2015-04-10 16:47:44 +0200 |
commit | 627b3bd2b09e4daf40001f2a7833df3ef2a257b2 (patch) | |
tree | 1ab02371b56f7cdf7477cfcc6c61ae602fff5531 /src/superio/nsc/pc8374/superio.c | |
parent | ceaabc94efec339f75732dd7bf72c51f8dc52941 (diff) |
cbtables: Add RAM config information
This adds the RAM config code to the coreboot tables. The purpose is
to expose this information to software running at higher levels, e.g.
to print the RAM config coreboot is using as part of factory tests.
The prototype for ram_code() is in boardid.h since they are closely
related and will likely have common code.
BUG=chrome-os-partner:31728
BRANCH=none
TEST=tested w/ follow-up CLs on pinky
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Change-Id: Idd38ec5b6af16e87dfff2e3750c18fdaea604400
Original-Reviewed-on: https://chromium-review.googlesource.com/227248
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
(cherry picked from commit 77dd5fb9347b53bb8a64ad22341257fb3be0c106)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: Ibe7044cafe0a61214ac2d7fea5f7255b2c11829b
Reviewed-on: http://review.coreboot.org/9438
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/superio/nsc/pc8374/superio.c')
0 files changed, 0 insertions, 0 deletions