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authorXavi Drudis Ferran <xdrudis@tinet.cat>2011-02-27 23:50:30 +0000
committerMarc Jones <marc.jones@amd.com>2011-02-27 23:50:30 +0000
commit1d80e5101772220213f64a8845b21fa063710995 (patch)
treec07a38025d2239dff2d6493bea0aa181f32a4fae /src/superio/ite
parent9683b1deb2b4489247418c477eb6a5ad59fa0bd1 (diff)
Prepare for next patches (Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage handling for Fam 10 in SVI mode). No change of behaviour intended. Refactor FAM10 fidvid . prep_fid_change was already long and it'd get longer with forthcoming patches. We now take apart F3xDC[NbsynPtrAdj], Northbridge/core synchronization FIFO pointer adjust, to its own function. Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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