soc/mediatek/mt8196: Add PLL and clock init support

Add PLL and clock init code, frequency meter and APIs for raising
little CPU frequency and set tvdpll frequency.

TEST=build pass and driver init ok
BUG=b:317009620

Signed-off-by: Guangjie Song <guangjie.song@mediatek.corp-partner.google.com>
Change-Id: Icac99fb210c87c8b7b14af627fbd2f14e4c47240
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84495
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>

0 files changed, 0 insertions, 0 deletions