diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-06-01 20:30:28 +1000 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-03 09:35:50 +0200 |
| commit | aef5594f7409636cfbe2c7ebb23da041e36cd7f6 (patch) | |
| tree | 15d74d95e582e27351b918e07dac9bfae59c7533 /src/superio/ite/it8772f | |
| parent | 1b3acb13e49753e53192d3e5b939713329d0d205 (diff) | |
superio/ite/it8772f: Depreciate early wdt functions
We have better written generic implementations of these functions
introduced in commit:
a7d14a1 ite/common: Introduce common watchdog and 3.3V VSB helpers
Change-Id: Ic93d78fce18c68d1d1bf3b537e8985a2532a8fcf
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5901
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/superio/ite/it8772f')
| -rw-r--r-- | src/superio/ite/it8772f/early_serial.c | 30 | ||||
| -rw-r--r-- | src/superio/ite/it8772f/it8772f.h | 3 |
2 files changed, 2 insertions, 31 deletions
diff --git a/src/superio/ite/it8772f/early_serial.c b/src/superio/ite/it8772f/early_serial.c index e9db117eae..ee9dbc5c4c 100644 --- a/src/superio/ite/it8772f/early_serial.c +++ b/src/superio/ite/it8772f/early_serial.c @@ -25,16 +25,14 @@ /* NOTICE: This file is deprecated, use ite/common instead */ /* The base address is 0x2e or 0x4e, depending on config bytes. */ -#define SIO_BASE IT8772F_BASE +/* FIXME: SUPERIO include.c */ +#define SIO_BASE 0x2e #define SIO_INDEX SIO_BASE #define SIO_DATA (SIO_BASE + 1) /* Global configuration registers. */ #define IT8772F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ #define IT8772F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ -#define IT8772F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */ -#define IT8772F_CONFIG_REG_MFC 0x2a /* Multi-function control */ -#define IT8772F_CONFIG_REG_WATCHDOG 0x72 /* Watchdog control. */ u8 it8772f_sio_read(u8 index) { @@ -63,30 +61,6 @@ static void it8772f_exit_conf(void) it8772f_sio_write(IT8772F_CONFIG_REG_CC, 0x02); } -/* Select 24MHz CLKIN (48MHz is the default). */ -void it8772f_24mhz_clkin(void) -{ - it8772f_enter_conf(); - it8772f_sio_write(IT8772F_CONFIG_REG_LDN, 0x00); - it8772f_sio_write(IT8772F_CONFIG_REG_CLOCKSEL, 0x1); - it8772f_exit_conf(); -} - -/* - * LDN 7, reg 0x2a - needed for S3, or memory power will be cut off. - * - * Enable 3VSBSW#. (For System Suspend-to-RAM) - * 0: 3VSBSW# will be always inactive. - * 1: 3VSBSW# enabled. It will be (NOT SUSB#) NAND SUSC#. - */ -void it8772f_enable_3vsbsw(void) -{ - it8772f_enter_conf(); - it8772f_sio_write(IT8772F_CONFIG_REG_LDN, IT8772F_GPIO); - it8772f_sio_write(IT8772F_CONFIG_REG_MFC, 0x80); - it8772f_exit_conf(); -} - /* Set AC resume to be up to the Southbridge */ void it8772f_ac_resume_southbridge(void) { diff --git a/src/superio/ite/it8772f/it8772f.h b/src/superio/ite/it8772f/it8772f.h index 3d45f095c1..8ba577ad43 100644 --- a/src/superio/ite/it8772f/it8772f.h +++ b/src/superio/ite/it8772f/it8772f.h @@ -21,9 +21,6 @@ #ifndef SUPERIO_ITE_IT8772F_H #define SUPERIO_ITE_IT8772F_H -/* FIXME: SUPERIO include.c */ -#define IT8772F_BASE 0x2e - #define IT8772F_FDC 0x00 /* Floppy disk controller */ #define IT8772F_SP1 0x01 /* Com1 */ #define IT8772F_EC 0x04 /* Environment controller */ |