summaryrefslogtreecommitdiff
path: root/src/superio/ite/it8728f/superio.c
diff options
context:
space:
mode:
authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-05-06 18:00:07 +1000
committerRudolf Marek <r.marek@assembler.cz>2014-05-11 17:20:31 +0200
commit946bee1c349db6bf88b4f6736dc910eb4890a74b (patch)
tree2a1d672da39581017cdef0d9db528802d5202a79 /src/superio/ite/it8728f/superio.c
parent31dbb536fae937f9201312f2c47213c65ca9d939 (diff)
superio/ite/it8728f: RAMstage PNP configuration component
Provide devicetree.cb RAMstage configuration of this superio component. Change-Id: I376d2fb6dafc301cbc437518012f8c43b0af4be2 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5668 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Diffstat (limited to 'src/superio/ite/it8728f/superio.c')
-rw-r--r--src/superio/ite/it8728f/superio.c69
1 files changed, 69 insertions, 0 deletions
diff --git a/src/superio/ite/it8728f/superio.c b/src/superio/ite/it8728f/superio.c
new file mode 100644
index 0000000000..ac08f724d7
--- /dev/null
+++ b/src/superio/ite/it8728f/superio.c
@@ -0,0 +1,69 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <superio/conf_mode.h>
+#include <console/console.h>
+#include <stdlib.h>
+
+#include "chip.h"
+#include "it8728f.h"
+#include "it8728f_internal.h"
+
+static void it8728f_init(device_t dev)
+{
+ struct superio_ite_it8728f_config *conf = dev->chip_info;
+
+ if (!dev->enabled)
+ return;
+
+ switch(dev->path.pnp.device) {
+ /* TODO: Might potentially need code for HWM or FDC etc. */
+ case IT8728F_EC:
+ it8728f_hwm_ec_init(dev);
+ break;
+ }
+}
+
+static struct device_operations ops = {
+ .read_resources = pnp_read_resources,
+ .set_resources = pnp_set_resources,
+ .enable_resources = pnp_enable_resources,
+ .enable = pnp_alt_enable,
+ .init = it8728f_init,
+ .ops_pnp_mode = &pnp_conf_mode_870155_aa,
+};
+
+/* TODO: incomplete */
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, IT8728F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x0ff8, 0}, {0x0ff8, 4}, },
+};
+
+static void enable_dev(device_t dev)
+{
+ pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_ite_it8728f_ops = {
+ CHIP_NAME("ITE IT8728F Super I/O")
+ .enable_dev = enable_dev
+};