diff options
| author | Wang Qing Pei <wangqingpei@gmail.com> | 2010-08-15 11:37:41 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-08-15 11:37:41 +0000 |
| commit | 6d7c1fc3a4a5dbf0c9f784b76f878f05386425a0 (patch) | |
| tree | c24d51e9af7ecc79d24cf2432eb9dab90f3ce4c5 /src/superio/ite/it8718f | |
| parent | 30584912579d050c6bb3de3d55ca887e6ae094b5 (diff) | |
Gigabyte dual bios mainboard will always reboot, caused by the superio.
After lots of testing, the SuperIO LDN 7, register 0xEF is the key to the
problem. This patch adds a function which stops dual bios mainboards from
rebooting, when called.
Signed-off-by: Wang Qing Pei <wangqingpei@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5697 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/ite/it8718f')
| -rw-r--r-- | src/superio/ite/it8718f/it8718f.h | 1 | ||||
| -rw-r--r-- | src/superio/ite/it8718f/it8718f_early_serial.c | 14 |
2 files changed, 15 insertions, 0 deletions
diff --git a/src/superio/ite/it8718f/it8718f.h b/src/superio/ite/it8718f/it8718f.h index 1967d25b5f..c441db3fbd 100644 --- a/src/superio/ite/it8718f/it8718f.h +++ b/src/superio/ite/it8718f/it8718f.h @@ -32,6 +32,7 @@ #if defined(__PRE_RAM__) && !defined(__ROMCC__) void it8718f_24mhz_clkin(void); +void it8718f_disable_reboot(void); void it8718f_enable_serial(device_t dev, unsigned iobase); #endif diff --git a/src/superio/ite/it8718f/it8718f_early_serial.c b/src/superio/ite/it8718f/it8718f_early_serial.c index fabbde5e8f..c3a8c73264 100644 --- a/src/superio/ite/it8718f/it8718f_early_serial.c +++ b/src/superio/ite/it8718f/it8718f_early_serial.c @@ -74,6 +74,20 @@ void it8718f_24mhz_clkin(void) it8718f_exit_conf(); } +/* GIGABYTE uses a special SuperIO register to protect its Dual BIOS + * mechanism. It lives in the GPIO LDN. However, register 0xEF is not + * mentioned in the IT8718F datasheet so just hardcode it to 0x7E for + * now. + */ +void it8718f_disable_reboot(void) +{ + it8718f_enter_conf(); + + it8718f_sio_write(0x07, 0xEF, 0x7E); + + it8718f_exit_conf(); +} + /* Enable the peripheral devices on the IT8718F Super I/O chip. */ void it8718f_enable_serial(device_t dev, unsigned iobase) { |