diff options
author | Uwe Hermann <uwe@hermann-uwe.de> | 2006-11-04 23:19:00 +0000 |
---|---|---|
committer | Uwe Hermann <uwe@hermann-uwe.de> | 2006-11-04 23:19:00 +0000 |
commit | 1549f2a557058000d65d913ffb8b60487bdc09ab (patch) | |
tree | 76b682c4c85aa73f281c3fe154400c3bdd9e893d /src/superio/ite/it8718f/it8718f_early_serial.c | |
parent | faea4c59abb37c80b530df0b5901eb3a89fb2dea (diff) |
Various minor cosmetic changes in the ITE Super I/Os, mostly whitespace
changes and fixing of comments.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/ite/it8718f/it8718f_early_serial.c')
-rw-r--r-- | src/superio/ite/it8718f/it8718f_early_serial.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/superio/ite/it8718f/it8718f_early_serial.c b/src/superio/ite/it8718f/it8718f_early_serial.c index a75842dc1f..212f964604 100644 --- a/src/superio/ite/it8718f/it8718f_early_serial.c +++ b/src/superio/ite/it8718f/it8718f_early_serial.c @@ -26,7 +26,7 @@ #define SIO_INDEX SIO_BASE #define SIO_DATA SIO_BASE+1 -/* Global Configuration Registers. */ +/* Global configuration registers. */ #define IT8718F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ #define IT8718F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ #define IT8718F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */ @@ -36,7 +36,7 @@ #define IT8718F_CONFIGURATION_PORT 0x2e /* Write-only. */ /* The content of IT8718F_CONFIG_REG_LDN (index 0x07) must be set to the - * LDN the register belongs to, before you can access the register. */ + LDN the register belongs to, before you can access the register. */ static void it8718f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) { outb(IT8718F_CONFIG_REG_LDN, SIO_BASE); @@ -45,7 +45,7 @@ static void it8718f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) outb(value, SIO_DATA); } -/* Enable the peripheral devices on the IT8718F Super IO chip. */ +/* Enable the peripheral devices on the IT8718F Super I/O chip. */ static void it8718f_enable_serial(device_t dev, unsigned iobase) { /* (1) Enter the configuration state (MB PnP mode). */ @@ -61,8 +61,8 @@ static void it8718f_enable_serial(device_t dev, unsigned iobase) /* (2) Modify the data of configuration registers. */ /* Select the chip to configure (if there's more than one). - * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. - * If this register is not written, both chips are configured. */ + Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + If this register is not written, both chips are configured. */ /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CONFIGSEL, 0x00); */ /* Enable all devices. */ @@ -76,12 +76,12 @@ static void it8718f_enable_serial(device_t dev, unsigned iobase) it8718f_sio_write(IT8718F_IR, 0x30, 0x1); /* Consumer IR */ /* Select 24MHz/48MHz CLKIN (set/clear bit 0). TODO: Needed? */ - /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CLOCKSEL, 0x00); */ + /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CLOCKSEL, 0x01); */ /* Clear software suspend mode (clear bit 0). TODO: Needed? */ /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_SWSUSP, 0x00); */ /* (3) Exit the configuration state (MB PnP mode). */ - it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CC, 0x02); + it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CC, 0x02); } |