diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2007-04-02 16:57:32 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2007-04-02 16:57:32 +0000 |
| commit | 23d1e35d4d2fd25c710c5b54bfe171d8d2db0cea (patch) | |
| tree | 8b180cda2a8eafc38ee2d2895392cf218e5b0761 /src/superio/ite/it8705f | |
| parent | cbef76ecf3b991a17549f36b09e73d0a103e6f13 (diff) | |
The *_early_serial.c pre-RAM code should do just that -- enable the serial
port(s), and nothing else. The code in superio.c will initialize the
rest when RAM is available...
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/ite/it8705f')
| -rw-r--r-- | src/superio/ite/it8705f/it8705f_early_serial.c | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/src/superio/ite/it8705f/it8705f_early_serial.c b/src/superio/ite/it8705f/it8705f_early_serial.c index ac80752e9c..2d5539c325 100644 --- a/src/superio/ite/it8705f/it8705f_early_serial.c +++ b/src/superio/ite/it8705f/it8705f_early_serial.c @@ -67,15 +67,9 @@ static void it8705f_enable_serial(device_t dev, unsigned iobase) If this register is not written, both chips are configured. */ /* it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CONFIGSEL, 0x00); */ - /* Enable all devices. */ - it8705f_sio_write(IT8705F_FDC, 0x30, 0x1); /* Floppy */ + /* Enable serial port(s). */ it8705f_sio_write(IT8705F_SP1, 0x30, 0x1); /* Serial port 1 */ it8705f_sio_write(IT8705F_SP2, 0x30, 0x1); /* Serial port 2 */ - it8705f_sio_write(IT8705F_PP, 0x30, 0x1); /* Parallel port */ - it8705f_sio_write(IT8705F_EC, 0x30, 0x1); /* Environment controller */ - it8705f_sio_write(IT8705F_GAME, 0x30, 0x1); /* GAME port */ - it8705f_sio_write(IT8705F_IR, 0x30, 0x1); /* Consumer IR */ - it8705f_sio_write(IT8705F_MIDI, 0x30, 0x1); /* MIDI port */ /* Select 24MHz CLKIN (set bit 0). */ it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CLOCKSEL, 0x01); |