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authorAamir Bohra <aamir.bohra@intel.com>2020-07-30 12:26:10 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-08-09 11:03:37 +0000
commit8aa86c9c1b630d4a3b635ccedf0e144b217597f9 (patch)
tree94ae971edaf4184c21a81f0401ad3d92f144d5cd /src/superio/ite/it8623e
parente4b22e7f19c7a2ed0d7b0126eb630c3c57af6003 (diff)
soc/intel/{icl.tgl,jsl}: Remove SMRAM register programming
SA SMRAMC register PCI offset 0x88 is deprecated for ICL, JSL and TGL. Removing the register programming for these platforms. The write to this register does not take effect and remains configured to 0, even when programmed. Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Change-Id: I3f581b90ea99012980f439a7914e8d901585b004 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44060 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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