diff options
| author | Vagiz Trakhanov <rakkin@autistici.org> | 2017-09-28 14:21:54 +0000 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-10-22 02:19:15 +0000 |
| commit | 17c577153042b6559bf7a9dca6ae9f644b18d770 (patch) | |
| tree | ee9c3c2381a73e6b9c7d36521a1af1c99aa2c6ac /src/superio/ite/common/env_ctrl.c | |
| parent | c85890d0d8887462e72837c3ae6dd5b6842a81cb (diff) | |
superio/ite/common: Add temperature offset
Add a devicetree option to set temperature adjustment registers
required for thermal diode sensors and PECI. However, this commit does
not have the code needed to make PECI interface actually use these
registers. It only applies to diodes.
As a temporary workaround, one can set both THERMAL_DIODE and peci_tmpin
to the same TMPIN, e.g. TMPIN3.mode="THERMAL_DIODE" and peci_tmpin="3".
PECI, apparently, takes precedence over diode, so the adjustment register
will be set and PECI activated. Or simply use the followup patch, which
makes THERMAL_PECI a mode like THERMAL_DIODE.
I don't have hardware to test THERMAL_DIODE mode, but in case of PECI,
without this patch I had about -60°C on idle. Now, with offset 97,
which was taken from vendor bios, PECI readings became reasonable 35°C.
TEST=Set a temperature offset, then ensure that the value you set is
reflected in /sys/class/hwmon/hwmon*/temp[1-3]_offset
Change-Id: Ibce6809ca86b6c7c0c696676e309665fc57965d4
Signed-off-by: Vagiz Tarkhanov <rakkin@autistici.org>
Reviewed-on: https://review.coreboot.org/21843
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/superio/ite/common/env_ctrl.c')
| -rw-r--r-- | src/superio/ite/common/env_ctrl.c | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/src/superio/ite/common/env_ctrl.c b/src/superio/ite/common/env_ctrl.c index 1e313ce715..c8274db6c8 100644 --- a/src/superio/ite/common/env_ctrl.c +++ b/src/superio/ite/common/env_ctrl.c @@ -99,13 +99,13 @@ static void enable_peci(const u16 base, const u8 tmpin) * into TMPINx register */ static void enable_tmpin(const u16 base, const u8 tmpin, - const enum ite_ec_thermal_mode mode) + const struct ite_ec_thermal_config *const conf) { u8 reg; reg = ite_ec_read(base, ITE_EC_ADC_TEMP_CHANNEL_ENABLE); - switch (mode) { + switch (conf->mode) { case THERMAL_DIODE: reg |= ITE_EC_ADC_TEMP_DIODE_MODE(tmpin); break; @@ -115,12 +115,20 @@ static void enable_tmpin(const u16 base, const u8 tmpin, default: printk(BIOS_WARNING, "Unsupported thermal mode 0x%x on TMPIN%d\n", - mode, tmpin); + conf->mode, tmpin); return; } ite_ec_write(base, ITE_EC_ADC_TEMP_CHANNEL_ENABLE, reg); + /* Set temperature offsets */ + if (conf->mode != THERMAL_RESISTOR) { + reg = ite_ec_read(base, ITE_EC_BEEP_ENABLE); + reg |= ITE_EC_TEMP_ADJUST_WRITE_ENABLE; + ite_ec_write(base, ITE_EC_BEEP_ENABLE, reg); + ite_ec_write(base, ITE_EC_TEMP_ADJUST[tmpin-1], conf->offset); + } + /* Enable the startup of monitoring operation */ reg = ite_ec_read(base, ITE_EC_CONFIGURATION); reg |= ITE_EC_CONFIGURATION_START; @@ -233,7 +241,7 @@ void ite_ec_init(const u16 base, const struct ite_ec_config *const conf) /* Enable HWM if configured */ for (i = 0; i < ITE_EC_TMPIN_CNT; ++i) - enable_tmpin(base, i + 1, conf->tmpin_mode[i]); + enable_tmpin(base, i + 1, &conf->tmpin[i]); /* Enable reading of voltage pins */ ite_ec_write(base, ITE_EC_ADC_VOLTAGE_CHANNEL_ENABLE, conf->vin_mask); |