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authorFelix Held <felix-coreboot@felixheld.de>2023-03-02 16:40:29 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-05-18 16:23:27 +0000
commit8c119079d1b9c11c1f9011ecf555a2fc6fd3cc34 (patch)
tree8c5e9307beab5ae988834744e5e9a88dd5a62345 /src/superio/fintek
parent8414eed5a04004a886cafc65763ff5448ff805dd (diff)
vc/amd/fsp/phoenix/FspUsb: update USB config struct for Phoenix SoC
Phoenix has one more Type C port and two more USB2 ports which are used as the legacy USB part of the two USB4 ports. The USB struct version numbers have also changed, since it's a newer and incompatible version of that struct. TEST=After changing FSP to not hard-code the USB PHY config, but use the configuration provided by coreboot, and applying this patch, the USB connector on the USB2 port 4 lines works. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: If52934595dd612154b97e7b90dbd96243146017a Reviewed-on: https://review.coreboot.org/c/coreboot/+/73379 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/superio/fintek')
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