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author | Felix Held <felix-coreboot@felixheld.de> | 2023-07-14 18:41:23 +0200 |
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committer | Martin L Roth <gaumless@gmail.com> | 2023-07-17 03:25:00 +0000 |
commit | 8336c72524a975564baccc1bf68d65dcfed61597 (patch) | |
tree | a93bc4a9a421d7d4dd0aeefb86dcee699e68cf1f /src/superio/fintek/f71869ad | |
parent | 9c0bce5f28a703aa9f7d777acc3ed35651ce2115 (diff) |
soc/amd/glinda/early_fch: don't call enable_acpimmio_decode_pm04
The enable_acpimmio_decode_pm04 function uses the IO port based indirect
access of the PM register space. The PM_INDEX and PM_DATA registers
don't exist any more on Glinda, so the code shouldn't access those.
Since the PM_04_ACPIMMIO_DECODE_EN bit in the
ACPIMMIO_DECODE_REGISTER_04 register is 1 after reset, the ACPIMMIO
space is still accessible.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic6bc0479ea4ea2b9fe3629a6e15940b31b2864d3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76456
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/superio/fintek/f71869ad')
0 files changed, 0 insertions, 0 deletions