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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-04-23 21:52:25 +1000
committerPatrick Georgi <patrick@georgi-clan.de>2014-04-26 18:22:11 +0200
commitcf7b4989083cb3fd1adf34dc5e07d4ac253e8f85 (patch)
tree47aba25be42b14b74d97bb68e9e1a4df3f986ca0 /src/superio/fintek/f71869ad/f71869ad.h
parent4566d2e7cd32c1c2bdcc85a09c580e9f00f6b1dd (diff)
superio/fintek/*: Factor out generic romstage component
The romstage of Fintek Super I/O's is identical, leading to replication of essentially the same code prone to bitrot. Herein we consolidate the early pre-ram UART initialisation code into fintek/common, rather we leave the exceptions to be implemented under model/. More precisely we provide a well documented version of early_serial.c under fintek/common and select by way of Kconfig as a generic romstage component to Super I/O support. We leave future Super I/O's the option to implement `non-standard` initialisation code should such a (unlikely) need araise. A primary advantage is that new support for romstage serial is now trival to add. We also provide some Kconfig documentation while here. Change-Id: I3c62561558a62ece944a167ba302fb7076bba001 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5575 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/superio/fintek/f71869ad/f71869ad.h')
-rw-r--r--src/superio/fintek/f71869ad/f71869ad.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/superio/fintek/f71869ad/f71869ad.h b/src/superio/fintek/f71869ad/f71869ad.h
index 43a4397451..3aeac56b82 100644
--- a/src/superio/fintek/f71869ad/f71869ad.h
+++ b/src/superio/fintek/f71869ad/f71869ad.h
@@ -32,6 +32,4 @@
#define F71869AD_BSEL 0x07 /* BSEL */
#define F71869AD_PME 0x0a /* Power Management Events (PME) and ACPI */
-void f71869ad_enable_serial(device_t dev, u16 iobase);
-
#endif /* SUPERIO_FINTEK_F71869AD_H */